Research Article
Frequency Optimization Objective during System Prototyping on Multi-FPGA Platform
Table 2
Comparison of routing strategies effects on prototyping system performance.
| | Benchmarks | Scenario 1 | Scenario 2 | Scenario 3 | Scenario 4 | | Mux_ratio | R_hop | Freq (MHz) | Mux_ratio | R_hop | Freq (MHz) | Mux_ratio | R_hop | Freq (MHz) | Mux_ratio | R_hop | Freq (MHz) |
| | Circuit A | 12 | 2 | 17.85 | 15 | 2 | 16.66 | 4 | 2 | 20.83 | 4 | 1 | 26.31 | | Circuit B | 18 | 3 | 13.88 | 24 | 2 | 14.7 | 4 | 3 | 17.24 | 7 | 1 | 23.8 | | Circuit C | 24 | 3 | 12.82 | 44 | 2 | 11.36 | 11 | 3 | 15.15 | 11 | 1 | 21.73 | | Circuit D | 50 | 3 | 9.61 | 50 | 2 | 10.63 | 15 | 3 | 14.28 | 20 | 1 | 18.51 | | Circuit E | 119 | 6 | 4.9 | 116 | 4 | 5.55 | 57 | 2 | 9.8 | 56 | 4 | 8.33 | | Circuit F | 160 | 3 | 4.67 | 168 | 3 | 4.5 | 68 | 3 | 8.19 | 68 | 1 | 9.8 | | Circuit G | 220 | 5 | 3.4 | 256 | 1 | 3.44 | 89 | 2 | 7.46 | 86 | 3 | 7.14 |
|
|
