IP-Enabled C/C++ Based High Level Synthesis: A Step towards Better Designer Productivity and Design Performance

Table 12

Available configurable parameters for Xilinx CORDIC IP core implementing sqrt() function.

Configurable parameter (attribute)	Possible values (attribute values) (to select one)
Pipelining mode	No pipelining, optimal, maximum
Data format	Unsigned fraction, unsigned integer
Input width	Range 8 to 48
Round mode	Truncate, round positive infinity (RPI), round positive negative infinity (RPNI), nearest even (RNE)
Optional pins	Handshake signals (chip enable, CE; synchronous clear, SCLR; new data, ND; ready, rdy)