Simple Hybrid Scaling-Free CORDIC Solution for FPGAs

Table 1

Distribution of iterations for hybrid devices of different bits.

𝑚	LUT	SF CORDIC	Multiplier
16	1,…,4	5,…,8	9,…,168
24	1,…,7	8,…,12	13,…,24
32	1,…,9	9,…,16	17,…,32
48	1,…,15	16,…,24	25,…,48