Fuzzy Logic Based Hardware Accelerator with Partially Reconfigurable Defuzzification Stage for Image Edge Detection

Table 2

Device utilization and maximum operating speed.

Device name	Maximum speed (MHz)	BRAM	DSP48E	FF	LUT
Artix7-Xc7a100t csg324-1	88.333	1	2	269	843
Artix7 Xc7a100t csg324-2	90.909	1	2	269	843
Artix7 Xc7a100t csg324-3	100.00	1	2	269	843
Kintex7 Xc7k160t fbg484-1	100.00	1	2	269	843
Kintex7 Xc7k160 tfbg484-2	111.111	1	2	269	843
Kintex7 Xc7k160 tfbg484-3	125.00	1	2	269	843