Selected Papers from SPL 2012: Programmable Logic and Applications

Call for Papers

Field programmable logic (FPGA: field-programmable gate arrays) devices are nowadays one of the most important alternatives to construct high-speed efficient digital systems. This technology was marketed in the mideighties with a simple but strong argument: its capability to be in house is erased and reconfigured in a few milliseconds. This feature allowed the designers to correct errors or introduce last-minute modifications and clearly distinguished FPGAs from other alternatives like standard cells or gate arrays. Designers soon discovered that reconfigurability facilitates the mapping of particular algorithms in hardware. This idea led to new lines of research such as FCCMs (field-custom computing machines) or RISP (reconfigurable instruction set processor). But also, the road to reconfigurable systems was opened. Circuits that could modify or adapt their functionality were created, and run-time reconfiguration was incorporated. Most of recent advances in reconfigurable computing make the boundary between hardware and software increasingly blurred.

The purpose of this special issue is to provide an opportunity for researchers, engineers, and designers to report recent advances in this important area of reconfigurable logic and applications using FPGAs. Potential topics include, but are not limited to:

  • Design methodology (low-power design, high-speed techniques, physical design, dynamic reconfiguration, interconnects, and NoCs)
  • EDA tools (logic and architectural synthesis, modeling and simulation, CAD for reconfigurable architectures, reconfigurable hardware design languages, system-level design methods, testing, verification, and benchmarking)
  • Platform-based design (embedded processors, custom computers, reconfigurable multicore, and IP cores)
  • Signal processing (computer arithmetic, digital signal processing, adaptive signal processing, and image and video processing)
  • FPGA in education (roadmap of programmable logic, teaching reconfigurable systems, and emerging device technologies)
  • Applications (communications networks, artificial vision, cryptography, bioinformatics, application acceleration, rapid prototyping, high-performance computing, and multimedia)
  • Reliable embedded applications (design verification and validation, reliability and fault tolerance, FIT rates analysis, high-reliability processor cores, noise, radiation effects, and EMC)

Submission to this special issue is limited to the invited top quality papers presented at the SPL conference which is located at http://www.splconf.org/spl12/.

Before submission authors should carefully read over the journal's Author Guidelines, which are located at http://www.hindawi.com/journals/ijrc/guidelines/. Prospective authors should submit an electronic copy of their complete manuscript through the journal Manuscript Tracking System at http://mts.hindawi.com/ according to the following timetable:

Manuscript DueFriday, 20 April 2012
First Round of ReviewsFriday, 13 July 2012
Publication DateFriday, 7 September 2012

Lead Guest Editor

Guest Editors