Selected Papers from the 17th Reconfigurable Architectures Workshop (RAW2010)

• Selected Papers from the 17th Reconfigurable Architectures Workshop (RAW2010), Aravind Dasu, João M. P. Cardoso, Eli Bozorgzadeh, and Jürgen Becker
  Volume 2011 (2011), Article ID 574972, 2 pages
• A Vector-Like Reconfigurable Floating-Point Unit for the Logarithm, Nikolaos Alachiotis and Alexandros Stamatakis
  Volume 2011 (2011), Article ID 341510, 12 pages
• A Streaming High-Throughput Linear Sorter System with Contention Buffering, Jorge Ortiz and David Andrews
  Volume 2011 (2011), Article ID 963539, 12 pages
• The Potential for a GPU-Like Overlay Architecture for FPGAs, Jeffrey Kingyens and J. Gregory Steffan
  Volume 2011 (2011), Article ID 514581, 15 pages
• Boosting Parallel Applications Performance on Applying DIM Technique in a Multiprocessing Environment, Mateus B. Rutzig, Antonio C. S. Beck, Felipe Madruga, Marco A. Alves, Henrique C. Freitas, Nicolas Maillard, Philippe O. A. Navaux, and Luigi Carro
  Volume 2011 (2011), Article ID 546962, 13 pages
• High-Level Synthesis of In-Circuit Assertions for Verification, Debugging, and Timing Analysis, John Curreri, Greg Stitt, and Alan D. George
  Volume 2011 (2011), Article ID 406857, 17 pages
• Floorplacement for Partial Reconfigurable FPGA-Based Systems, A. Montone, M. D. Santambrogio, F. Redaelli, and D. Sciuto
  Volume 2011 (2011), Article ID 483681, 12 pages
• Operating System for Runtime Reconfigurable Multiprocessor Systems, Diana Göhringer, Michael Hübner, Etienne Nguepi Zeutebouo, and Jürgen Becker
  Volume 2011 (2011), Article ID 121353, 16 pages