Current Trends on Reconfigurable Computing
Call for Papers
Self-reconfiguration and adaptivity are important new concepts for reconfigurable hardware. The benefits include, for example, a reduction in power dissipation by sharing resources, therefore requiring smaller reconfigurable chips. Idle applications are substituted on demand by actually needed functions. As a result, the number of possible functions controlled by such systems increases without raising the number of additionally required processing elements. Parallel tasks (functions) in hardware execute more efficiently compared with sequential microprocessors. The high performance of reconfigurable hardware and the possibility of hardware parallelization help to overcome increasing problems of data processing with traditional microcontroller and microprocessors in future complex electronic systems. A relevant issue is the use of adaptive reconfigurable systems in real-time applications, which is one of the basic conditions for a variety of target applications. New approaches to create systems, which are able to manage their own configuration, are called run-time systems. These systems use the flexibility of, for example, an FPGA by partially changing the configuration. Only the necessary functions are configured in the chip's memory. On demand one or more functions can be substituted by another while other parts stay operative. Creating such systems has the following benefits:
- Reducing chip area and therefore power
- Increasing the life-cycle by exploiting the reprogrammability and ability to adapt to new standards (e.g., bus-protocols)
- High portability of the architecture bridges the life-cycle gap between the electronic products/technologies
- Reduction of production and stock-keeping costs due to less different components
- Reduction of complexity for maintenance
The scope of the proposed special issue is the description of actual and future trends on reconfigurable computing with the aim of collecting the research material and results from academic and industrial specialists all over the world. The topics for the special issue can be from the novel trends in organic computing, reconfigurable multiprocessor systems, heterogeneous reconfigurable architectures, and FPGA-based design.
Topics of the Special Issue:
- Coarse grained reconfigurable hardware architectures
- Fine grained reconfigurable hardware architectures
- Multigrained/heterogeneous reconfigurable architectures
- Bio-inspired architectures
- Emerging techhnologies for reconfigurable computing/architecture
- Tools and development for reconfigurable architectures
- Formal representations of adaptable applications
- Reconfigurable architecture models
- Mapping adaptable applications to reconfigurable architectures
- System-level modelling, analysis and exploration
- Practical uses of partial reconfiguration (power, size, optimisation, etc.)
- Software—hardware to soft-hardware—making reconfigurable hardware accessible to domain experts
- Multiprocessor on FPGA especially advantages over directly mapping application to hardware
- Network-on-chip on FPGA (benefits and costs)
Authors should follow the International Journal of Reconfigurable Computing manuscript format described at the journal site http://www.hindawi.com/journals/ijrc/. Prospective authors should submit an electronic copy of their complete manuscript through the journal Manuscript Tracking System at http://mts.hindawi.com/ according to the following timetable:
| Manuscript Due | March 1, 2008 |
| First Round of Reviews | June 1, 2008 |
| Publication Date | September 1, 2008 |
Guest Editors
- Jürgen Becker, Universität Karlsruhe (TH), 76131 Karlsruhe, Germany
- Michael Hübner, Universität Karlsruhe (TH),76131 Karlsruhe, Germany
- Roger Wood, Queen's University, Belfast BT7 1NN, North Ireland
- Philip Leong,The Chinese University, Hong Kong, Shatin, NR, Hong Kong
- Rob Esser, Xilinx Inc., Dublin, Ireland
- Lionel Torres, LIRMM, UMR 5506, 34392 Montpellier Cedex 5, France