ISRN Electronics http://www.hindawi.com The latest articles from Hindawi Publishing Corporation © 2014 , Hindawi Publishing Corporation . All rights reserved. OTRA Based Voltage Mode Third Order Quadrature Oscillator Tue, 29 Apr 2014 10:01:19 +0000 http://www.hindawi.com/journals/isrn.electronics/2014/126471/ Two topologies of operational transresistance (OTRA) based third order quadrature oscillators (QO) are proposed in this paper. The proposed oscillators are designed using a combination of lossy and lossless integrators. The proposed topologies can be made fully integrated by implementing the resistors using matched transistors operating in linear region, which also facilitates electronic tuning of oscillation frequency. The nonideality analysis of the circuit is also given and for high frequency applications self-compensation can be used. Workability of the proposed QOs is verified through PSPICE simulations using 0.5 μm AGILENT CMOS process parameters. The total harmonic distortion (THD) for both the QO designs is found to be less than 1%. Rajeshwari Pandey, Neeta Pandey, Gurumurthy Komanapalli, and Rashika Anurag Copyright © 2014 Rajeshwari Pandey et al. All rights reserved. Comprehensive Review and Comparative Analysis of Hardware Architectures for Sobel Edge Detector Sun, 06 Apr 2014 08:36:06 +0000 http://www.hindawi.com/journals/isrn.electronics/2014/857912/ This paper presents a comprehensive review and a comparative study of various hardware/FPGA implementations of Sobel edge detector and explored different architectures for Sobel gradient computation unit in order to show the various trade-offs involved in choosing one over another. The different architectures using pipelining and/or parallelism (key methodologies for improving the performance/frame rates) are explored for gradient computation unit in Sobel edge detector. How the different architectures affected performance (in terms of video frame rate and image size) and area (in terms of FPGA resources usages) has been demonstrated. By exploiting the trade-offs between video frame rate, image size, and FPGA resources a designer should be able to find an optimal architecture for a given application. Sanjay Singh, Sumeet Saurav, Ravi Saini, Anil Kumar Saini, Chandra Shekhar, and Anil Vohra Copyright © 2014 Sanjay Singh et al. All rights reserved. Estimation of Different Performance Parameters of Slotted Microstrip Antennas with Air-Gap Using Neural Networks Thu, 27 Mar 2014 09:40:02 +0000 http://www.hindawi.com/journals/isrn.electronics/2014/296105/ Over the past decade, artificial neural networks have emerged as fast computational medium for predicting different performance parameters of microstrip antennas due to their learning and generalization features. This paper illustrates a neural network model for instantly predicting the resonance frequencies, gains, directivities, antenna efficiencies, and radiation efficiencies for dual-frequency operation of slotted microstrip antennas with air-gap. The proposed neural model is valid for any arbitrary slot-dimensions and inserted air-gap within their specified ranges. A prototype is fabricated using Roger’s substrate and its performance is measured for validation. A very good agreement is achieved in simulated, predicted, and measured results. Taimoor Khan and Asok De Copyright © 2014 Taimoor Khan and Asok De. All rights reserved. Study of Linearity and Power Consumption Requirements of CMOS Low Noise Amplifiers in Context of LTE Systems and Beyond Tue, 04 Mar 2014 09:48:16 +0000 http://www.hindawi.com/journals/isrn.electronics/2014/391240/ This paper presents a study of linearity in wideband CMOS low noise amplifiers (LNA) and its relationship to power consumption in context of Long Term Evolution (LTE) systems and its future developments. Using proposed figure of merit (FoM) to compare 35 state-of-the-art LNA circuits published over the last decade, the paper explores a dependence between amplifier performance (i.e., combined linearity, noise figure, and gain) and power consumption. In order to satisfy stringent linearity specifications for LTE standard (and its likely successors), the paper predicts that LNA FoM increase in the range of +0.2 dB/mW is expected and will inevitably translate into a significant increase in power consumption—a critical budget planning aspect for handheld devices, active antenna arrays, and base stations operating in small cells. Grzegorz Szczepkowski and Ronan Farrell Copyright © 2014 Grzegorz Szczepkowski and Ronan Farrell. All rights reserved. A Novel Dual-Polarization Total Power Radiometer with Single Channel Thu, 13 Feb 2014 06:43:53 +0000 http://www.hindawi.com/journals/isrn.electronics/2014/242630/ A dual-polarization total power millimeter wave (MMW) radiometer with single channel was proposed in this paper. It completed the subtraction of two orthogonally polarized signals in the RF front end. The system used one channel to achieve the function of two channels. On the basis of discussing the theory and the configuration of the system, the performance of the system and the ability to identify the false target were analyzed and simulated. The results showed the radiometer could solve the problem that the performance of dual-polarization radiometer becomes weak because of gain inconformity with two channels. The system was cheap and small and could identify the false target which has different apparent temperatures at vertical- and horizontal-polarized radiations. Yiming Niu, Can Cui, Guo Yang, and Wen Wu Copyright © 2014 Yiming Niu et al. All rights reserved. Low Voltage Floating Gate MOS Transistor Based Differential Voltage Squarer Sun, 09 Feb 2014 15:36:30 +0000 http://www.hindawi.com/journals/isrn.electronics/2014/357184/ This paper presents novel floating gate MOSFET (FGMOS) based differential voltage squarer using FGMOS characteristics in saturation region. The proposed squarer is constructed by a simple FGMOS based squarer and linear differential voltage attenuator. The squarer part of the proposed circuit uses one of the inputs of two-input FGMOS transistor for threshold voltage cancellation so as to implement a perfect squarer function, and the differential voltage attenuator part acts as input stage so as to generate the differential signals. The proposed circuit provides a current output proportional to the square of the difference of two input voltages. The second order effect caused by parasitic capacitance and mobility degradation is discussed. The circuit has advantages such as low supply voltage, low power consumption, and low transistor count. Performance of the circuit is verified at ±0.75 V in TSMC 0.18 μm CMOS, BSIM3, and Level 49 technology by using Cadence Spectre simulator. Maneesha Gupta, Richa Srivastava, and Urvashi Singh Copyright © 2014 Maneesha Gupta et al. All rights reserved. Low Frequency Axial Flux Linear Oscillating Electric Drive Suitable for Short Strokes Thu, 30 Jan 2014 00:00:00 +0000 http://www.hindawi.com/journals/isrn.electronics/2014/765161/ The design, analysis, and control methodology of an energy efficient and high force to weight ratio rare earth N42 NdFeB based permanent magnet linear oscillating motor has been described. For this axial flux machine the mover is consisting of Aluminium structure embedded with rare earth permanent magnets of high energy density. Microcontroller based drive is developed for frequency and thrust control of the machine. Finite element method using FEMM is employed for analysis of various performance parameters of machine. The same parameters are also compared with the measured ones, which yields a good agreement to the proposed design. Govindaraj Thangavel Copyright © 2014 Govindaraj Thangavel. All rights reserved. Output Signal Power Analysis in Erbium-Doped Fiber Amplifier with Pump Power and Length Variation Using Various Pumping Techniques Tue, 26 Nov 2013 15:39:11 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/312707/ The scope of this paper is to analyze the output signal power with pump power and length variation in cascaded EDFA simulation model performance. This paper describes the simulation model of Erbium-Doped Fiber Amplifier (EDFA) of variable lengths (10 m, 50 m, and 120 m) with dual pumping techniques (dual forward pumping with two 980 nm wavelengths, dual forward and backward pumping with two 980 nm wavelengths) and Tri-pumping techniques. The simulation models consist of input source and pump power coupled by WDM coupler which gives optimized signal power in the above-mentioned simulation model. The simulation model consists of source with multiple wavelengths (1520 nm–1618 nm), pumping source with the wavelength 980 nm, isolator, and filter. The resulting models accurately represent EDFA optimized output signal power. Simulation results show that choosing careful fiber length 120 m and pump power 1 W in dual pumping provided 0.07 W optimized output signal power compared to other pumping techniques. S. Semmalar and S. Malarkkan Copyright © 2013 S. Semmalar and S. Malarkkan. All rights reserved. Transformer Magnetizing Inrush Currents Using a Directly Coupled Voltage-Source Inverter Thu, 31 Oct 2013 09:40:59 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/361643/ The connection of a power transformer to the grid is associated with magnetizing inrush currents that may result in power quality issues as well as faulty relay tripping. In distributed generation, the transformer may instead be premagnetized from the source to avoid this. In this paper, a VSI is directly coupled to a transformer. Three different strategies of premagnetization are implemented into the control system, and the inrush currents are measured for various values of the remanent flux in the core. The results show good reduction in the peak magnetizing inrush currents without using any external circuitry. Rickard Ekström, Senad Apelfröjd, and Mats Leijon Copyright © 2013 Rickard Ekström et al. All rights reserved. Third-Order Quadrature Oscillator Circuit with Current and Voltage Outputs Thu, 03 Oct 2013 13:58:46 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/385062/ The paper presents a new quadrature oscillator of third order which can provide four quadrature current outputs and two quadrature voltage outputs. The new circuit employs three differential voltage current conveyors and six passive components, most of which are in grounded form. Circuit operation at high frequencies is verified along with nonideality and parasitic study. The circuit enhancement for generation of four phase clock waveforms is also given. The proposed circuit is a novel addition to the oscillator family. Bhartendu Chaturvedi and Sudhanshu Maheshwari Copyright © 2013 Bhartendu Chaturvedi and Sudhanshu Maheshwari. All rights reserved. A Phase Noise Analysis Method for Millimeter-Wave Passive Imager BHU-2D-U Frequency Synthesizer Wed, 25 Sep 2013 10:18:34 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/750269/ A nontrivial phase noise analysis method is proposed for frequency synthesizer of a passive millimeter-wave synthetic aperture interferometric radiometer (SAIR) imager for concealed weapon detections on human bodies with high imaging rates. The frequency synthesizer provides local oscillator signals for both millimeter-wave front ends and intermediate frequency IQ demodulators for the SAIR system. The influence of synthesizer phase noise in different offset frequency ranges on the visibility phase errors has been systematically investigated with noise requirements drawn, and the integrated RMS phase error could represent uncorrelated phase noise effects in the most critical offset frequency range for visibility error control. An analytical phase noise simulation method is proposed to guide synthesizer design. To conclude, the phase noise effects on SAIR visibility errors have been concretized to noise design requirements, and good agreements have been observed between simulation and measurement results. The frequency synthesizer designed has been successfully in operation in BHU-2D-U system. Jin Zhang, Cheng Zheng, Xianxun Yao, and Baohua Yang Copyright © 2013 Jin Zhang et al. All rights reserved. Comparative Study of Resistorless Filters Using Differential Voltage Current Controlled Current Feedback Operational Amplifiers and Differential Voltage Current Controlled Current Conveyors Mon, 23 Sep 2013 08:48:10 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/910170/ Differential Voltage Current Controlled Current Feedback Operational Amplifier is an attractive active element for realizing resistorless filters with a minimum active component count. This is verified through a design example, where a 3rd-order leapfrog filter has been realized using the AMS 0.35 μm CMOS process design kit. The performance of the Differential Voltage Current Controlled Current Feedback Operational Amplifier filter is evaluated and compared with that obtained by the corresponding filter, where Differential Voltage Current Controlled Current Conveyors have been employed. Costas Laoudias and Costas Psychalinos Copyright © 2013 Costas Laoudias and Costas Psychalinos. All rights reserved. A High-Efficient Multi-Output Mixed Dynamic/Static Single-Bit Adder Cell Tue, 10 Sep 2013 15:30:25 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/376869/ Dynamic logic is a well-known logic style which is widely used in digital electronics. A mixed dynamic/static full adder cell is presented in this paper with the aim of reaching high efficiency. The midoutputs are obtained from a Multi-output dynamic module. Then, a multiplexer generates final outputs in the static part. Several conventional and state-of-the-art dynamic adders are also surveyed and compared in the paper. All circuits are simulated by HSPICE with 32 nm CNFET technology. The proposed design is the fastest dynamic adder cell. In addition, it has approximately 5% higher efficiency in terms of PDP than the second most high-performance cell, which is DDCVS. Shima Mehrabi, Reza Faghih Mirzaee, Keivan Navi, and Omid Hashemipour Copyright © 2013 Shima Mehrabi et al. All rights reserved. An Enhancement of AODV with Multi-Radio in Hybrid Wireless Mesh Network Tue, 03 Sep 2013 15:36:39 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/925176/ AODV-MR (on-demand routing protocol with multi-radio extension) has been designed to support multi-radio interfaces; it uses more than one interface of the same mesh router or gateways for broadcasting duplicated control packets (i.e., RREQ, RRER, and HELLO message) or to rebroadcast it. We have modified AODV-MR, by allocating one interface in a dynamic manner for sending routing/control packets or data packets. This allocation of interfaces is based on type of mesh routers and traffic direction. The efficiency and effectiveness of the modification work have been evaluated compared with AODV-MR in terms of packet delivery ratio, routing packet overhead, end to end delay, and throughput. Mohammad Meftah Alrayes, Sanjay Kumar Biswash, Neeraj Tyagi, Rajeev Tripathi, Arun Kumar Misra, and Sanjeev Jain Copyright © 2013 Mohammad Meftah Alrayes et al. All rights reserved. A New 7-Level Symmetric Multilevel Inverter with Minimum Number of Switches Thu, 29 Aug 2013 15:09:47 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/476876/ Though the multilevel inverters hold attractive features, usage of more switches in the conventional configuration poses a limitation to its wide range application. Therefore, a renewed 7-level multilevel inverter topology is introduced incorporating the least number of unidirectional switches and gate trigger circuitry, thereby ensuring the minimum switching losses, reducing size and installation cost. The new topology is well suited for drives and renewable energy applications. The performance quality in terms of THD and switching losses of the new MLI is compared with conventional cascaded MLI and other existing 7-level reduced switch topologies using carrier-based PWM techniques. The results are validated using MATLAB/SIMULINK. S. Umashankar, T. S. Sreedevi, V. G. Nithya, and D. Vijayakumar Copyright © 2013 S. Umashankar et al. All rights reserved. Optimum Barrier Height for SiC Schottky Barrier Diode Wed, 31 Jul 2013 16:23:48 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/528094/ The study of barrier height control and optimization for Schottky barrier diode (SBD) from its physical parameters have been introduced using particle swarm optimization (PSO) algorithm. SBD is the rectifying barrier for electrical conduction across the metal semiconductor (MS) junction and, therefore, is of vital importance to the successful operation of any semiconductor device. 4H-SiC is used as a semiconductor material for its good electrical characteristics with high-power semiconductor devices applications. Six physical parameters are considered during the optimization process, that is, device metal, mobile charge density, fixed oxide charge density, interface trapped charge density, oxide thickness, and voltage drop across the metal-semiconductor contact. The optimization process was performed using a MATLAB program. The results show that the SBD barrier height has been optimized to achieve a maximum or minimum barrier height across the contact, in addition to the ability of controlling the physical parameters to adjust the device barrier height. Alaa El-Din Sayed Hafez and Mohamed Abd El-Latif Copyright © 2013 Alaa El-Din Sayed Hafez and Mohamed Abd El-Latif. All rights reserved. Reversible Logic-Based Fault-Tolerant Nanocircuits in QCA Sun, 16 Jun 2013 14:36:00 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/850267/ Parity-preserving reversible circuits are gaining importance for the development of fault-tolerant systems in nanotechnology. On the other hand, Quantum-dot Cellular Automata (QCA), a potential alternative to CMOS, promises efficient digital design at nanoscale. This work targets design of reversible ALU (arithmetic logic unit) in QCA (Quantum-dot Cellular Automata) framework. The design is based on the fault tolerant reversible adders (FTRA) introduced in this paper. The proposed fault tolerant adder is a parity-preserving gate, and QCA implementation of FTRA achieved 47.38% fault-free output in the presence of all possible single missing/additional cell defects. The proposed designs are verified and evaluated over the existing ALU designs and found to be more efficient in terms of design complexity and quantum cost. Bibhash Sen, Siddhant Ganeriwal, and Biplab K. Sikdar Copyright © 2013 Bibhash Sen et al. All rights reserved. Real-Time Implementation of Change Detection for Automated Video Surveillance System Tue, 11 Jun 2013 15:26:33 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/691930/ Change detection is one of the several important problems in the design of any automated video surveillance system. Appropriate selection of frames of significant changes can minimize the communication and processing overheads for such systems. This research presents the design of a VLSI architecture for change detection in a video sequence and its implementation on Virtex-IIPro FPGA platform. Clustering-based scheme is used for change detection. The proposed system is designed to meet the real-time requirements of video surveillance applications. It robustly detects the changes in a video stream in real time at 25 frames per second (fps) in gray scale CIF size video. Sanjay Singh, A. S. Mandal, Chandra Shekhar, and Anil Vohra Copyright © 2013 Sanjay Singh et al. All rights reserved. Analysis and Design of Digital IIR Integrators and Differentiators Using Minimax and Pole, Zero, and Constant Optimization Methods Thu, 06 Jun 2013 12:36:32 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/493973/ Proposed work deals with the design of a family of stable IIR digital integrators via use of minimax and pole, zero, and constant optimization methods. First the minimax optimization method is used to design a family of second-, third-, and fourth-order digital integrators by optimizing the magnitude response in a min-max sense under the satisfactory condition of constant group delay. Then the magnitude and group delay response is further improved using pole, zero, and constant optimization method. Subsequently, by modifying the transfer function of all of the designed integrators appropriately, new differentiators are obtained. Simulation results show that proposed approach outperforms existing design methods in terms of both magnitude and phase response. Madhu Jain, Maneesha Gupta, and N. K. Jain Copyright © 2013 Madhu Jain et al. All rights reserved. Low-Voltage Complex Filters Using Current Feedback Operational Amplifiers Tue, 04 Jun 2013 08:27:54 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/915758/ A novel complex filter topology realized using current feedback operational amplifiers as active elements is introduced in this paper. Offered benefits are the low-voltage operation capability and the requirement for employing only grounded passive elements. Two application examples are provided, where the frequency behavior of the derived filters fulfills the ZigBee and Bluetooth standards, respectively. Their performance evaluation has been done through simulation results at postlayout level, using MOS transistor models provided by AMS C35B4 CMOS process. Panagiotis Samiotis and Costas Psychalinos Copyright © 2013 Panagiotis Samiotis and Costas Psychalinos. All rights reserved. Novel Low Complexity Pulse-Triggered Flip-Flop for Wireless Baseband Applications Sat, 25 May 2013 13:01:29 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/187127/ A low complexity dual-mode pulse-triggered FF design for wireless baseband processing is presented in this paper. It supports both single-edge- and double-edge-triggered operations subject to a mode select control. Due to the novelty in pulse generator design, the layout area overhead is only 8% when compared with other single-mode counterpart design. Postlayout simulations in TSMC 1P6M 0.18 μm CMOS process model also indicate that the proposed design is as efficient as its single-mode counterpart in various performance metrics. Hung-Chi Chu, Jin-Fa Lin, and Dong-Ting Hu Copyright © 2013 Hung-Chi Chu et al. All rights reserved. A Low Power Voltage Controlled Oscillator Design Wed, 15 May 2013 07:58:36 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/987179/ The performance of voltage controlled oscillator (VCO) is of great importance for any telecommunication or data transmission network. Here, voltage controlled oscillators (VCOs) using three-transistor NAND gates have been designed. New delay cell with three-transistor NAND gate has been used for designing the ring based VCO circuits. Three-, five-, and seven-stage VCOs have been proposed. Output frequency has been controlled with supply voltage variation from 1.8 V to 2.4 V. Three stage VCO shows output frequency variation in the range of 3.2909 GHz to 4.2280 GHz whereas power consumption varies in the range of 335.4071 μW to 486.1816 μW. Five-stage VCO depicts frequency in the range of 1.9406 GHz to 2.5769 GHz with power consumption variation from 559.0118 μW to 810.3027 μW. Moreover a seven-stage VCO shows frequency variation from 1.3984 GHz to 1.8077 GHz. Power consumption of seven-stage VCO varies from 782.6165 μW to 1134.400 μW. Phase noise results for these VCOs have also been obtained. Power consumption, output frequency, and phase noise results of proposed circuits have been compared with earlier reported circuits, and the proposed circuits show significant improvements. Manoj Kumar Copyright © 2013 Manoj Kumar. All rights reserved. New OTRA-Based Generalized Impedance Simulator Thu, 09 May 2013 15:03:43 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/907597/ Operational transresistance amplifier (OTRA) has attracted considerable attention in the recent literature in several applications such as impedance simulation, universal biquad filter realization, realization of sinusoidal oscillators and multivibrators. However, to the best knowledge of the authors, any OTRA-based generalized impedance simulator circuits have not been reported so far. The purpose of this paper is to present such a circuit. Ashish Gupta, Raj Senani, D. R. Bhaskar, and A. K. Singh Copyright © 2013 Ashish Gupta et al. All rights reserved. A Review of Optoelectronic Oscillators for High Speed Signal Processing Applications Mon, 29 Apr 2013 11:40:09 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/401969/ The Optoelectronic Oscillator (OEO) was first demonstrated in 1996 as a low phase noise RF source. Low phase noise RF sources have uses for multiple applications, ranging from analog to digital converters to radar to metrology. In the past sixteen years, the OEO has been shown to be useful for other signal processing applications. This paper will provide a background of the OEO’s principles of operation, as well as multiple examples of signal processing applications where the OEO can be used. The OEO can be applied to both analog and digital problems, providing new techniques to solve these challenges. Paul Devgan Copyright © 2013 Paul Devgan. All rights reserved. Voltage Mode Astable Multivibrator Using Single CDBA Sun, 07 Apr 2013 16:31:14 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/390160/ This paper aims at presenting three voltage mode square wave generator circuits using single current differencing buffered amplifier (CDBA), a recently proposed mixed mode building block. The first proposed circuit produces a variable frequency output having fixed duty cycle, whereas the rest of the circuits have variable duty cycle. One of the circuits uses passive element adjustment to control the duty cycle, whereas electronic control is used in the other circuit. The workability of the proposed circuits is confirmed through SPICE simulations and experimental work. Rajeshwari Pandey, Neeta Pandey, Sajal K. Paul, Kashish Anand, and Kranti Ghosh Gautam Copyright © 2013 Rajeshwari Pandey et al. All rights reserved. Review and Progress towards the Capacity Boost of Overhead and Underground Medium-Voltage and Low-Voltage Broadband over Power Lines Networks: Cooperative Communications through Two- and Three-Hop Repeater Systems Thu, 28 Mar 2013 16:22:49 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/472190/ This paper reviews and analyzes the broadband capacity and the coexistence potential of overhead and underground medium-voltage/broadband over power lines (MV/BPL) and low-voltage/broadband over power lines (LV/BPL) topologies when one and two repeaters are additively deployed between their existing transmitting and receiving ends (overhead and underground MV/BPL and LV/BPL topologies with two- and three-hop repeater system, respectively). The contribution of this paper is four fold. First, the factors that influence the broadband capacity performance of overhead and underground MV/BPL and LV/BPL topologies with multihop repeater systems are identified, namely the number of repeaters, the distribution power grid type—either overhead or underground, either MV or LV, the initial distribution BPL topology, the multiconductor transmission line configuration, and coupling scheme applied. Second, the well-validated applicability of two-hop repeater systems is now extended in overhead and underground LV/BPL and MV/BPL networks. The significant mitigating role of two-hop repeater systems against capacity losses due to aggravated topologies or different coupling schemes is verified. Third, the deployment upgrade of two- to three-hop repeater systems in distribution BPL topologies is first examined in terms of broadband capacity performance. To study the occurred capacity improvement, suitable capacity contour plots are first proposed. Fourth, multi-hop repeater systems are identified as valuable technology solution so that the required intraoperability between overhead and underground MV/BPL and LV/BPL networks, which is a prerequisite condition before BPL systems symbiosis with other broadband technologies (interoperability), is promoted. Athanasios G. Lazaropoulos Copyright © 2013 Athanasios G. Lazaropoulos. All rights reserved. A New MISO-Type Voltage-Mode Universal Biquad Using Single VD-DIBA Wed, 20 Mar 2013 16:18:12 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/478213/ A new multiple-input single-output-(MISO-)-type multifunction voltage-mode universal biquadratic filter employing single voltage differencing differential input buffered amplifier (VD-DIBA), two capacitors, and one resistor are proposed. The proposed structure can realize second-order low pass, high pass, band pass, band stop, and all pass filter responses without altering the circuit topology. The proposed new filter configuration also provides the following advantageous features, not available simultaneously in any of the single active device /element-based universal biquad in realizing all the five filter functions known earlier so far: (i) no requirement of any passive component(s) matching condition or inversion of input signal(s), (ii) independent electronic control of angular frequency () and bandwidth (BW), and (iii) low active and passive sensitivities. SPICE simulation results have been included using 0.35 µm TSMC technology to confirm the validity of the proposed new universal biquadratic filter configuration. K. L. Pushkar, D. R. Bhaskar, and Dinesh Prasad Copyright © 2013 K. L. Pushkar et al. All rights reserved. CDBA Based Universal Inverse Filter Sun, 17 Mar 2013 12:04:23 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/181869/ Current difference buffered amplifier (CDBA) based universal inverse filter configuration is proposed. The topology can be used to synthesize inverse low-pass (ILP), inverse high-pass (IHP), inverse band-pass (IBP), inverse band-reject (IBR), and inverse all-pass filter functions with appropriate admittance choices. Workability of the proposed universal inverse filter configuration is demonstrated through PSPICE simulations for which CDBA is realized using current feedback operational amplifier (CFOA). The simulation results are found in close agreement with the theoretical results. Rajeshwari Pandey, Neeta Pandey, Tushar Negi, and Vivek Garg Copyright © 2013 Rajeshwari Pandey et al. All rights reserved. Voltage-Mode Universal Biquadratic Filter Using Single DVCC Sun, 10 Mar 2013 08:48:04 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/125746/ A voltage-mode universal biquadratic filter using a differential voltage current conveyor (DVCC), two capacitors, and two resistors is presented. The proposed circuit has four input terminals and three output terminals and can realize all the standard filter functions, which are lowpass, bandpass, highpass, notch, and allpass filters, without changing the circuit topology. Three simultaneous output filter responses can be obtained from some derived filter types. The proposed circuit employs only one DVCC that simplifies the configuration. Jiun-Wei Horng and Zih-Yang Jhao Copyright © 2013 Jiun-Wei Horng and Zih-Yang Jhao. All rights reserved. Influence of Carbon Layer on the Properties of Ni-Based Ohmic Contact to n-Type 4H-SiC Thu, 28 Feb 2013 18:09:07 +0000 http://www.hindawi.com/journals/isrn.electronics/2013/271658/ Nickel-based contacts with additional interfacial layer of carbon, deposited on n-type 4H-SiC, were annealed at temperatures ranging from 600 to 1000°C and the evolution of the electrical and structural properties were analyzed by I-V measurements, SIMS, TEM, and Raman spectroscopy. Ohmic contact is formed after annealing at 800°C and minimal specific contact resistance of about  Ω cm2 has been achieved after annealing at 1000°C. The interfacial carbon is amorphous in as-deposited state and rapidly diffuses and dissolves in nickel forming graphitized carbon. This process activates interfacial reaction between Ni and SiC at lower temperature than usual and causes the formation of ohmic contact at relatively low temperature. However, our results show that the specific contact resistance as well as interface quality of contacts was not improved, if additional layer of carbon is placed between Ni and SiC. A. Kuchuk, V. Kladko, Z. Adamus, M. Wzorek, M. Borysiewicz, P. Borowicz, A. Barcz, K. Golaszewska, and A. Piotrowska Copyright © 2013 A. Kuchuk et al. All rights reserved.