Barrier Evaluation by Linearly Increasing Voltage Technique Applied to Si Solar Cells and Irradiated Pin Diodes

<table>Comparison of charge extraction BELIV current transients simulated for single-type traps (dash) and for simultaneously acting several-type generation centers (dots) with that simulated without contribution of thermal emission from traps (solid curve).</table>

International Scholarly Research Notices

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Figure 4: Barrier Evaluation by Linearly Increasing Voltage Technique Applied to Si Solar Cells and Irradiated Pin Diodes 