Voltage Mode Astable Multivibrator Using Single CDBA

Abstract

This paper aims at presenting three voltage mode square wave generator circuits using single current differencing buffered amplifier (CDBA), a recently proposed mixed mode building block. The first proposed circuit produces a variable frequency output having fixed duty cycle, whereas the rest of the circuits have variable duty cycle. One of the circuits uses passive element adjustment to control the duty cycle, whereas electronic control is used in the other circuit. The workability of the proposed circuits is confirmed through SPICE simulations and experimental work.

1. Introduction

It is well known that inherent wide bandwidth which is virtually independent of closed loop gain, greater linearity and large dynamic range [1] are the key performance features of current mode technique. The CDBA is one such active element which exploits these advantages. In addition, it is free from parasitic capacitances [2] and, hence, is appropriate for high frequency operation. It provides further flexibility to the designers, enabling a variety of circuit designs, as it can operate in both current and voltage modes [3].

The square wave generator finds extensive applications in communication systems, control systems, instrumentation, and signal processing. The literature review reveals that several triangular/square wave generators using various analog building blocks have already been presented [4–11]. All these designs use a current source to alternately charge and discharge a capacitor followed by a Schmitt trigger to generate triangular/square wave. Conventional voltage-mode square wave generators [4] employ an op-amp working in the nonlinear region to produce a square wave signal. These voltage-mode generators, however, have a limitation on their maximum frequency due to lower slew rate and constant gain-bandwidth product of the op-amps.

Triangular/square wave generators presented in [5–11] use current mode building-blocks-based circuits. The study of these circuits reveals that (i)references [5, 6, 10] employ more than one active element;(ii)references [6–10] use four or more passive elements;(iii)references [6–11] lack electronic controllability of duty cycle of output.

The aim of this paper is to present three square wave generator circuits using single CDBA and three to five passive elements. In Section 2, the function of a CDBA is introduced followed by the description of proposed circuits with analytical formulation for the frequency of oscillation. Section 3 explores the effect of nonidealities of CDBA on the proposed circuits. PSPICE simulation results and experimental results are presented in Section 4 which are in confirmation with the theoretical propositions. Section 5 concludes the paper.

2. Circuit Descriptions

The circuit symbol of CDBA is shown in Figure 1. The port characteristics are given as follows 𝐼_𝑧𝑉_𝑤𝑉_𝑝𝑉_𝑛=001−1𝑉100000000000^𝑧𝐼_𝑤𝐼_𝑝𝐼_𝑛. (1)

Figure 1 

Block diagrammatic representation of CDBA.

2.1. Circuit I

The circuit for the astable multivibrator is shown in Figure 2. It uses a single CDBA block, two resistors and a capacitor. The resistor 𝑅_𝐹 and capacitor 𝐶 form a positive feedback loop. The load resistance 𝑅_𝐿 connected to the 𝑧 terminal is large enough to drive the device output 𝑉₀ into one of the two saturation levels 𝑉⁺_sat or 𝑉⁻_sat. This results in charging of the capacitor present in the feedback loop. When the voltage across the capacitor reaches a value at which the current through 𝑅_𝐿 is not large enough to maintain the output voltage at 𝑉⁺_sat the output switches to 𝑉⁻_sat and the capacitor starts charging in the opposite direction as shown in Figure 3.

Figure 2 

Astable multivibrator with fixed 50% duty cycle.

Figure 3 

Output of the astable multivibrator of Figure 2.

Routine analysis suggests that the output will switch between its maximum (𝑉⁺_sat) and minimum (𝑉⁻_sat) value when the capacitor voltage reaches the following two threshold voltages: 𝑉_TL=𝑅_𝐿−𝑅_𝐹𝑅_𝐿𝑉⁻_sat,𝑉_TH=𝑅_𝐿−𝑅_𝐹𝑅_𝐿𝑉⁺_sat. (2)(3) The time required to charge (𝑇_on) the capacitor from a value of 𝑉_TL to 𝑉_TH is given by 𝑇_on=𝑅_𝐹𝐶ln2𝑅_𝐿𝑅_𝐹−1. (4) Similarly, time taken for discharging (𝑇_off) from 𝑉_TH to 𝑉_TL is 𝑇_off=𝑅_𝐹𝐶ln2𝑅_𝐿𝑅_𝐹−1. (5) From (4) and (5), it is clear that 𝑅_𝐿>𝑅_𝐹.

Thus, the output of the multivibrator is a symmetric square wave having amplitudes of 𝑉⁺_sat and 𝑉⁻_sat, at a frequency (𝑓_𝑜) given by 𝑓_𝑜=1𝑇_on+𝑇_off=12𝑅_𝐹𝐶ln2𝑅_𝐿/𝑅_𝐹.−1 (6) Though the circuit is simple and output frequency can be controlled through passive components, however, the on and off duty cycles of the output are fixed at 50%.

2.2. Circuit II

The circuit of Figure 2 can be modified for variable duty cycle output by replacing the resistor 𝑅_𝐹 with two diodes and two resistors and is depicted in Figure 4. It is based on the scheme discussed in [11] and has been adapted for implementation with CDBA.

Figure 4 

Astable multivibrator having resistor-controlled duty cycle.

Neglecting the drop across the diodes, the parameters 𝑉_TH, 𝑉_TL, 𝑇_on and 𝑇_off may be obtained as 𝑉_TL=𝑅_𝐿−𝑅₁𝑅_𝐿𝑉⁻_sat,𝑉_TH=𝑅_𝐿−𝑅₂𝑅_𝐿𝑉⁺_sat,𝑇_on=𝑅₂𝐶ln2𝑅_𝐿−𝑅₁𝑅₂,𝑇_off=𝑅₁𝐶ln2𝑅_𝐿−𝑅₂𝑅₁. (7)(8)(9)(10) From (9) and (10), the frequency (𝑓_𝑜) of modified square wave generator can be written as 𝑓_𝑜=1𝑅₂𝐶ln2𝑅_𝐿−𝑅₁/𝑅₂+𝑅₁𝐶ln2𝑅_𝐿−𝑅₂/𝑅₁,where𝑅_𝐿>𝑅₁,𝑅₂. (11) It can be seen clearly that 𝑇_on and 𝑇_off can be controlled by changing 𝑅₂ and 𝑅₁.

2.3. Circuit III

The circuit shown in Figure 5 is another astable multivibrator. In this circuit, the duty cycle can be electronically controlled by the application of an external DC source 𝑉_dc.

Figure 5 

Astable multivibrator having electronically controlled duty cycle.

Routine analysis for this circuit gives the 𝑉_TH and 𝑉_TL as 𝑉_TH=𝑉⁺_sat𝑅1−^𝐹𝑅_𝐿+𝑉_dc𝑅_𝐹𝑅_𝑆,𝑉_TL=𝑉⁻_sat𝑅1−^𝐹𝑅_𝐿+𝑉_dc𝑅_𝐹𝑅_𝑆. (12)(13) These values of 𝑉_TH and 𝑉_TL result in 𝑇_on and 𝑇_off as follows: 𝑇_on=𝑅𝐶ln2𝑅_𝐿/𝑅_𝐹−1−𝑅_𝐿𝑉_dc/𝑉⁺_sat𝑅_𝑆1−𝑉_dc𝑅_𝐿/𝑉⁺_sat𝑅_𝑆,𝑇_off=𝑅𝐶ln2𝑅_𝐿/𝑅_𝐹−1−𝑉_dc𝑅_𝐿/𝑉⁻_sat𝑅_𝑆1−𝑉_dc𝑅_𝐿/𝑉⁻_sat𝑅_𝑆. (14) These results show that the on and off duty cycles of the output can be controlled with the help of externally applied voltage 𝑉_dc.

3. Realizing a CDBA and Nonideality Analysis

In the analysis so far, ideal characteristics of the CDBA were considered. However, in this section, the effect of the parameters of a practical model of the CDBA is investigated. For the proposed circuits, the CDBA was realized using current feedback operational amplifier (CFOA) ICAD844 as shown in Figure 6 [12]. The equivalent circuit of Figure 6, which uses practical model of AD844 [13], is shown in Figure 7. Herein, the CFOAs have been replaced with current conveyors having finite input resistances (𝑅_𝑥) and finite resistance at its 𝑧 terminal (𝑅_𝑧). Ideally, the input resistance at the 𝑥 terminal is zero and is infinite at the 𝑧 terminal. For the AD844 CFOA, the input resistances 𝑅_𝑥=50 Ω and 𝑅_𝑧=3 MΩ [13]. This circuit is used for exploring the nonideal behavior of all the three proposed circuits.

Figure 6 

CDBA constructed with AD844.

Figure 7 

Equivalent circuit of CDBA constructed with AD844.

From Figure 7, various currents can be calculated as follows: 𝐼_𝑧1=𝐼_𝑝,𝐼_𝐷=𝐼_𝑧1𝑅_𝑧𝑅_𝑥+𝑅_𝑧,𝐼_𝑥2=𝐼_𝑛−𝐼_𝐷,𝐼_𝑧2=𝐼_𝑥2. (15)

Ideally, 𝐼_𝐷 should be equal to 𝐼_𝑧1, which can be approximated only if 𝑅_𝑧≫𝑅_𝑥, which is true for AD844. Also, the approximation that the input terminals are virtually grounded will be true only if the external resistance at the input terminal of the CDBA is much larger than 𝑅_𝑥. If these two conditions are satisfied, the CDBA constructed with AD844 closely approximates an ideal CDBA.

Taking into account the afore mentioned approximations, from (15), 𝐼_𝑧, the current from 𝑧 terminal, can be calculated as 𝐼_𝑧=𝐼_𝑝−𝐼_𝑛. (16) And the output voltage 𝑉_𝑤 is given as 𝑉_𝑤=𝑉_𝑧. (17) If the equivalent circuit of CDBA constructed with AD844 is used in Figure 2 (circuit I), then the threshold limits of the output get modified to 𝑉_TL=𝑅_𝐿//𝑅_𝑧−𝑅_𝐹+𝑅_𝑥𝑅_𝐿//𝑅_𝑧𝑉⁻_sat,𝑉_TH=𝑅_𝐿//𝑅_𝑧−𝑅_𝐹+𝑅_𝑥𝑅_𝐿//𝑅_𝑧𝑉⁺_sat. (18)(19) Since 𝑅_𝐿≪𝑅_𝑧 and 𝑅_𝐹≫𝑅_𝑥, (18) and (19) reduce to (2) and (3), respectively.

The threshold limits of the output of Figure 4 (circuit II), on using the equivalent CDBA model, get modified to 𝑉_TL=𝑅_𝐿//𝑅_𝑧−𝑅₁+𝑅_𝑥+𝑅_𝐷1𝑅_𝐿//𝑅_𝑧𝑉⁻_sat,𝑉_TH=𝑅_𝐿//𝑅_𝑧−𝑅₂+𝑅_𝑥+𝑅_𝐷2𝑅_𝐿//𝑅_𝑧𝑉⁺_sat, (20)(21) where 𝑅_𝐷1 and 𝑅_𝐷2 are forward resistances of the diodes 𝐷₁ and 𝐷₂, respectively, and are of very small order as compared to 𝑅₁ and 𝑅₂. Also, since 𝑅_𝑥≪𝑅_𝐹 and 𝑅_𝑧≫𝑅_𝐿, (20) and (21) can be approximated to (7) and (8), respectively.

Similarly, for the astable circuit shown in Figure 5 (circuit III), the modified threshold limits of the output can be expressed as 𝑉_TH=𝑉⁺_sat𝑅1−^𝐹+𝑅_𝑥𝑅_𝐿//𝑅_𝑧+𝑉_dc𝑅_𝐹+𝑅_𝑥𝑅_𝑆+𝑅_𝑥,𝑉_TL=𝑉⁻_sat𝑅1−^𝐹+𝑅_𝑥𝑅_𝐿//𝑅_𝑧+𝑉_dc𝑅_𝐹+𝑅_𝑥𝑅_𝑆+𝑅_𝑥. (22)(23)

The external resistance at the input of the CDBA should be much larger than 𝑅_𝑥 so that the feedback current can be absorbed into the input terminals. Since 𝑅_𝐿, 𝑅_𝐹, 𝑅_𝑆, and 𝑅_𝑧≫𝑅_𝑥, (22) and (23) reduce to (12) and (13), respectively.

4. Simulation and Experimental Results

To validate the theoretical predictions, the proposed astable multivibrator circuits have been simulated using PSPICE macromodel of current feedback operational amplifier (CFOA) AD 844 and experimented using commercially available AD 844AN. The CDBA realization using CFOA AD 844 is shown in Figure 6. Simulations were carried out to investigate the maximum and minimum frequencies that proposed circuit configuration of Figure 2 (circuit I) can offer before the output signal gets distorted. Supply voltage of ±10 V was used for simulations. Figure 8 shows the output of the proposed circuit for minimum and maximum frequencies which can be achieved, with frequency deviation not more than 5%. The simulated square wave output obtained with component values as 𝑅_𝐹=20 KΩ, 𝑅_𝐿=50 KΩ and 𝐶=10 𝜇F is shown in Figure 8(a). This is the minimum frequency that can be obtained from the circuit and its value is observed to be 2 Hz as against the theoretically computed value of 1.9 Hz. Similarly output for maximum achievable frequency is shown in Figure 8(b). Component values used are 𝑅_𝐹=1 KΩ, 𝑅_𝐿=40 KΩ and 𝐶=100 pF. The simulated frequency is noted to be 1.2 MHz showing a minor deviation from the theoretically calculated value of 1.14 MHz.

(a) Minimum frequency output

(b) Maximum frequency output

Figure 8 

Output of circuit I.

To test the tunability of this circuit, the variation in frequency, against the passive components 𝐶, 𝑅_𝐿, and 𝑅_𝐹, was observed. The variation of frequency against the capacitor 𝐶 is presented in Figure 9(a), whereas Figures 9(b) and 9(c) plot the variations against the resistors 𝑅_𝐿 and 𝑅_𝐹, respectively.

(a)

(b)

(c)

Figure 9 

(a) Variation of calculated and simulated values of frequency with 𝐶 for 𝑅𝐹=15 KΩ and 𝑅𝐿=40 KΩ. (b) Variation of calculated and simulated values of frequency with 𝑅𝐿 for 𝐶=100 pF and 𝑅𝐹=5KΩ. (c) Variation of calculated and simulated values of frequency with 𝑅𝐹 for 𝐶=100 pF and 𝑅𝐿=30KΩ.

The circuit configuration of Figure 4 (circuit II) was simulated to investigate the variation of duty cycle by changing the passive component values. A typical output of this circuit is given in Figure 10(a), wherein curve (1) is plotted for 𝑅₁=25 KΩ and 𝑅₂=2 KΩ and curve (2) for 𝑅₁=4 KΩ and 𝑅₂=15 KΩ. The values of 𝑅_𝐿 and 𝐶 are kept as 40 KΩ 1 nF, respectively, for both curves. It clearly shows that the on and off periods of the output are not fixed anymore. Figure 10(b) shows the plot of the calculated frequency and the simulated frequency of oscillation as a function of 𝐶 while keeping 𝑅_𝐿=40 KΩ, 𝑅₁=20 KΩ, and 𝑅₂=4 KΩ. The deviation in frequency arises since the voltage drop across the diodes and their forward resistance is not taken into account in calculations.

(a)

(b)

Figure 10 

(a) Output of circuit II. (b) Variation of calculated and simulated values of frequency with 𝐶.

Figure 11 shows the output of circuit III for three different values of 𝑉_dc, that is, 2 V, 5 V, and −2 V, while rest of the component values are chosen as 𝑅_𝑠=40 K, 𝑅_𝐿 = 40 K, 𝑅_𝐹=15 K, and 𝐶=1 nF. It is evident that the output frequency and duty cycle can be controlled using 𝑉_dc.

(a)

(b)

(c)

Figure 11 

(a) Output of circuit III with 𝑉dc=2 V. (b) Output of circuit III with 𝑉dc=5 V. (c) Output of circuit III with 𝑉dc=−2V.

Figure 12(a) shows the comparison between the calculated frequency and the simulated frequency of oscillations as a function of 𝑉_dc, and Figure 12(b) shows variation of duty cycle with 𝑉_dc, for component values of 𝑅_𝑆=40 K, 𝑅_𝐿=40 K, 𝑅_𝐹=15 K, and 𝐶=1 nF. It is observed that all the simulated results are found in close agreement with the theoretically formulated values.

(a)

(b)

Figure 12 

(a) Variation of calculated and simulated value of frequency with DC bias. (b) Variation of duty cycle with DC bias.

The functionality of the proposed square wave generator circuits is verified experimentally as well. The commercial 𝐼𝐶 AD844AN is used to implement a CDBA. Supply voltages used are ±10 V.

Figure 13 shows typical experimental results for circuit I for three different frequencies. Figure 13(a) is output for component values of 𝑅_𝐿=82 KΩ, 𝑅_𝐹=15 KΩ, and 𝐶=10 nF. The measured frequency of 1.547 KHz closely matches the theoretical frequency of 1.46 KHz as obtained from (6). Output for component values of 𝑅_𝐿=3.9 KΩ, 𝑅_𝐹=1 KΩ, and 𝐶=2 nF is shown in Figure 13(b), wherein the measured frequency of oscillation is 123.3 KHz as against the computed value of 130 KHz. Another screen shot of oscilloscope is shown in Figure 13(c) for 𝑅_𝐿=40 KΩ, 𝑅_𝐹=1 KΩ, and 𝐶=100 pF. Observed output is having a frequency of oscillation as 824 KHz and the corresponding calculated value is found to be 1.14 MHz. Experimental outputs for the circuit III are shown in Figure 14 for different values of 𝑉_dc, which depicts the variation of duty cycle with 𝑉_dc.

(a)

(b)

(c)

Figure 13 

Experimental output obtained from circuit I.

(a)

(b)

Figure 14 

Experimental outputs for circuit III for (a) 𝑉dc=−5 V and (b) 𝑉dc=2 V.

5. Conclusion

Three astable multivibrator circuits using single CDBA are proposed. The first circuit (circuit I) produces a variable frequency output with fixed duty cycle. The other two proposed circuits (circuit II and circuit III) provide output with variable duty cycle; for circuit II, duty cycle control is accomplished through passive component adjustment, and for circuit III, electronic control is used. Nonideality analysis is presented to explore the effect of the parameters of a practical model of the CDBA. The workability of the proposed circuits is demonstrated through SPICE simulations and experimental work. AD-844-based CDBA is used for simulation and hardware circuit tests. Results are found to be in conformity with the proposed theory.