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ISRN Electronics
Volume 2013 (2013), Article ID 823630, 6 pages
http://dx.doi.org/10.1155/2013/823630
Research Article

Electronically Controllable Sinusoidal Oscillator Employing CMOS VD-DIBAs

1Department of Electronics and Communication Engineering, Faculty of Engineering and Technology, Jamia Millia Islamia, New Delhi 110025, India
2Department of Electronics and Communication Engineering, Maharaja Agrasen Institute of Technology, Rohini, New Delhi 110058, India

Received 23 November 2012; Accepted 19 December 2012

Academic Editors: L.-F. Mao, E. Tlelo-Cuautle, and Z.-M. Tsai

Copyright © 2013 Dinesh Prasad et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

A new electronically controllable sinusoidal oscillator employing two voltage differencing-differential input buffered amplifiers (VD-DIBAs), two grounded capacitors, and one grounded resistor is presented. The proposed configuration offers (i) independent control of condition of oscillation (CO) and frequency of oscillation (FO) formerly by resistance and later through transconductance, (ii) low active and passive sensitivities, and (iii) a good frequency stability. The workability of the proposed configuration has been demonstrated by SPICE simulation.

1. Introduction

Sinusoidal oscillators find numerous applications in communication, control systems, signal processing, instrumentation, and measurement systems. In the recent past, a large number of single resistance controlled oscillators (SRCOs) have been proposed, see [111]; however, in all these SRCOs, the frequency of oscillation can be controlled by varying the values of resistances involved. Obviously, by replacing one of the grounded resistors by JFETs/MOSFETs, electronic tunability can be established, see [2, 4] and the references cited therein. Electronically controllable sinusoidal oscillators (ECSOs) based on different active building blocks are available in the literature, see [1217] and the references cited therein. The advantages, applications, and usefulness of recently introduced new active building block named voltage differencing-differential input buffered amplifier (VD-DIBA) are now being recognized in the literature [1820]. Recently, electronically controllable grounded and floating simulated inductance circuits using VD-DIBAs have been introduced in [20]. However, to the best knowledge and belief of the authors, no ECSO using VD-DIBAs has yet been presented in the open literature so far. The purpose of this paper is, therefore, to propose a new ECSO using VD-DIBAs along with a minimum possible number of grounded passive components, which offers (i) independent control of oscillation frequency and condition of oscillation, (ii) low active and passive sensitivities, and (iii) a good frequency stability factor.

2. The Proposed Configuration

The schematic symbol and behavioral model of the VD-DIBA are shown in Figures 1(a) and 1(b), respectively [18]. The model includes two controlled sources: the current source controlled by differential voltage , with the transconductance , and the voltage source controlled by differential voltage , with the unity voltage gain. The VD-DIBA can be described by the following set of equations:

fig1
Figure 1: (a) Schematic symbol, (b) behavioral model of VD-DIBA.

The proposed new ECSO configuration is shown in Figure 2.

823630.fig.002
Figure 2: The proposed configuration.

A routine circuit analysis of Figure 2 yields the following characteristic equation:

Thus, the condition of oscillation (CO) and frequency of oscillation (FO) are given by

Therefore, it is seen that FO is independently controllable by transconductance of the VD-DIBA2 (which is current controllable by bias current, ), whereas CO is independently established through the resistor . The above routine circuit analysis can also be obtained using the analysis performance as given in [21, 22].

The CMOS implementation of VD-DIBA is shown in Figure 3. For this purpose, the TSMC CMOS 0.18 μm process parameters are used for all MOSFETs in the circuit of Figure 3.

823630.fig.003
Figure 3: CMOS Implementation of VD-DIBA, and [20].

Transistor aspect ratios are indicated in Table 1.

tab1
Table 1

The TSMC CMOS 0.18 μm process parameters are given in Table 2.

tab2
Table 2

3. Nonideal Analysis

Let and denote the parasitic resistance and parasitic capacitance of the terminal. Taking into account the nonidealities of the VD-DIBA, namely , where and are voltage tracking errors of the VD-DIBA then the expressions for CO and FO are found to be

Taking , and , then (4) reduces to

This nonideal analysis can also be determined using the analysis performance as given in [23].

The active and passive sensitivities are calculated as which are all low.

4. Frequency Stability

Using the definition of the frequency stability factor as given in [24] (where is the normalized frequency and represents the phase of the open-loop transfer function of the oscillator circuit), with , and , where is a frequency-controlling transconductor ratio, the of the proposed oscillator is found to be . Therefore, a good frequency stability is obtainable by selecting larger value of .

5. Simulation Results

To verify the theoretical analysis, the proposed circuit has been simulated using the CMOS-based VD-DIBA (Figure 3). The component values used were , and , the CMOS VD-DIBA was biased with ±1 V D.C. power supplies with and . The transconductances of VD-DIBA are controlled by bias currents. SPICE generated output waveforms indicating transient and steady state responses are shown in Figures 4(a) and 4(b), respectively. These results, thus, confirm the validity of the proposed configuration. Figure 5 shows the output spectrum, where the total harmonic distortion (THD) is found to be 1.26%. The oscillator circuit of Figure 2 has been checked for robustness using Monte-Carlo simulations, the sample result has been shown in Figure 6, which confirms that for ±10% variations in the value of , the value of oscillation frequency remain close to its normal value of 1.005 MHz and hence almost unaffected by change in . A comparison with other previously known ECSOs has been given in Table 3.

tab3
Table 3
fig4
Figure 4: (a) Transient output waveform, (b) steady-state response of the output.
823630.fig.005
Figure 5: Simulation result of the output spectrum.
823630.fig.006
Figure 6: Result of Monte-Carlo Simulation of oscillator circuit of Figure 2.

6. Concluding Remarks

A new circuit configuration employing two VD-DIBAs along with a minimum possible number of grounded passive elements (i.e., only one resistor and two capacitors) has been proposed. In oscillator mode, the circuit offers (i) independent control of condition of oscillation and frequency of oscillation former by resistance and later through transconductance, (ii) low active and passive sensitivities, and (iii) a good frequency stability for larger values of . The validity of the proposed circuit has been established by SPICE simulations.

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