Process Completing Sequences for Resource Allocation Systems with Synchronization

Abstract

This paper considers the problem of establishing live resource allocation in workflows with synchronization stages. Establishing live resource allocation in this class of systems is challenging since deciding whether a given level of resource capacities is sufficient to complete a single process is NP-complete. In this paper, we develop two necessary conditions and one sufficient condition that provide quickly computable tests for the existence of process completing sequences. The necessary conditions are based on the sequence of completions of 𝑛 subprocesses that merge together at a synchronization. Although the worst case complexity is O(2^𝑛), we expect the number of subprocesses combined at any synchronization will be sufficiently small so that total computation time remains manageable. The sufficient condition uses a reduction scheme that computes a sufficient capacity level of each resource type to complete and merge all 𝑛 subprocesses. The worst case complexity is O(𝑛⋅𝑚), where 𝑚 is the number of synchronizations. Finally, the paper develops capacity bounds and polynomial methods for generating feasible resource allocation sequences for merging systems with single unit allocation. This method is based on single step look-ahead for deadly marked siphons and is O(2^𝑛). Throughout the paper, we use a class of Petri nets called Generalized Augmented Marked Graphs to represent our resource allocation systems.

1. Introduction

In recent years, liveness-enforcing supervisory control has been an active area of research for resource allocation systems characterized by processes with highly ordered, linear workflows. This research has been motivated to a large degree by the need to control resource allocation in large, highly automated manufacturing systems, where process workflow is highly sequential and is typically prespecified in a product’s process plan. In brief, a sequential resource allocation system (RAS) consists of a set of resources, each available at a finite level, and a set of processes that progresses through sequences of processing stages, with each stage requiring a predetermined set of the system resources. Furthermore, a process instance is allowed to advance to its next stage only when it has been granted the complete set of required resources and only then will it release the currently held resources that are not required for the following stage.

Because the resource allocation schemes discussed above are embedded in the operation of many technologically advanced systems, a complete understanding of their worst case behaviors is essential when devising operating logic for their control. Indeed, if resource allocation is not properly constrained, the sequential RAS will attain resource allocation states from which additional allocation-deallocation of some subset of resources is not possible. This situation is highly undesirable, because resource allocation stalls, the involved processes and the resources they hold are idle, and outside intervention to resolve and reset the system is required. Liveness enforcing supervision seeks to avoid these situations and maintain completely smooth operation by imposing an appropriate supervisory control policy.

Reveliotis et al. [1] present a taxonomy for sequential RAS based on the structure of the allocation requests associated with various processing stages. This taxonomy includes (i) single-unit (SU) RAS, which admits only linearly ordered process sequences with resource requests corresponding to standard unit vectors, (ii) conjunctive (C) RAS, which admits linearly ordered process flows with arbitrary resource requests, and (iii) disjunctive/conjunctive (D/C) RAS, which allows the process to use alternative workflow sequences. Lower-numbered classes in the taxonomy are specializations of the higher-numbered and therefore present simpler behaviors which are more easily analyzed and controlled. Indeed, many results on RAS liveness and the synthesis of tractable liveness enforcing supervisors (LES) have been developed for the SU-RAS class, see, for example, [2, 3] for seminal papers. Researchers have also addressed the problem in the context of the more general classes of D-RAS, C-RAS, and D/C-RAS, see [4, 5] for early results. An interesting discussion that provides a unifying perspective for many of these results, and also highlights the currently prevailing issues in the area, can be found in [6]. Additional recent reviews are provided in [7, 8].

In [9], Reveliotis et al. extends the taxonomy of [1] to include RAS with process synchronizations, that is, RAS where a process may consist of several subprocesses operating independently until some synchronization stage is attained, at which point subprocesses recombine through merging and splitting and then continue as a new set. We shall refer to this class of RAS as A/D-RAS (assembly/disassembly RAS), since, in the case of manufacturing, this class covers products with both assembly and disassembly in their specified workflow. We notice, however, that synchronization also commonly occurs in project management and business workflow scenarios where finite resources must be allocated to competing tasks, which must eventually merge and spawn successor tasks.

From the perspective of logical analysis and control, a major difference between the A/D-RAS and those addressed in the taxonomy of [1] is that we can no longer quickly be sure that the given level of resource capacities is sufficient to complete even a single process. More specifically, since a single process may consist of several concurrent and independently operating subprocesses, each requesting, using, and holding resources, there is no guarantee that resources are of sufficient capacity to allow these subprocesses to attain required synchronization states. In this paper, we refer to this issue as the “quasi-liveness” problem since, by definition, an underlying Petri net model of the A/D-RAS will be quasi-live if, for every transition of the net (including those representing synchronizations), there exists a sequence of transition firings (resource allocations) that enables that transition. In [9], it is established that the lack of quasi-liveness in the A/D-RAS can be explained by the presence of a particular type of deadly marked siphon in the underlying net dynamics and that testing quasi-liveness, a rather easy task for nets modeling the D/C-RAS, now becomes an NP-complete problem (cf. also [10] for a formal proof on the NP-completeness of the quasi-liveness problem in the considered RAS class). Thus, assessing process quasi-liveness raises important and novel research problems to be addressed for this RAS. For quasi-live processes, an additional issue is identifying sequences of resource allocations that enable the involved process synchronizations. Once such sequences have been identified, standard D/C-RAS deadlock avoidance policies can be implemented to control concurrent allocation of resources across several concurrently operating processes.

We note that in [11], Xie and Jeng also study resource allocation in systems with synchronizations by analyzing a class of ordinary Petri nets called extended resource control nets (ERCN). More specifically, they develop structural characterizations for the ERCN quasi-liveness and liveness that are based on the notion of empty siphons. In other work, Wu et al. [12] model assembly/disassembly processes using resource-oriented Petri nets. Based on the models, a deadlock control policy is proposed and proved to be computationally efficient and less conservative than the existing policies in the literature. Hsieh [13] develops a subclass of Petri net models called nonordinary controlled flexible assembly Petri nets with uncertainties for assembly systems and studies their robustness to resource failure. Hu et al. [14] proposes a class of Petri nets to study automated manufacturing systems with either flexible routes or assembly operations. Using structural analysis, the authors show that liveness of such systems can be attributed to the absence of under-marked siphons.

Our work, on the other hand, places more emphasis on the associated design and control problems, seeking first to find resource levels that guarantee quasi-liveness and then to find resource allocation sequences that enable synchronization transitions. In [15, 16], we model the A/D-RAS using a subclass of Petri nets known as Generalized Augmented Marked Graphs (G-AMG). Based upon the notion of reachability graph, we present an algorithm that determines the quasi-liveness of a process subnet by enumerating all execution sequences that are resource-enabled under the considered resource availability; if the net is quasi-live, there will be at least one sequence that leads to process completion. For a quasi-live process, the reachability graph provides complete information about the resource allocation sequences that can be used. Since the graph is exponential in size, it is generally necessary to select a smaller subset of sequences to use for supervision. Based on the work presented in [15, 16], Choi [17] develops a mixed integer program that selects a small subset of process completing sequences for the development of liveness enforcing supervisors. This defines a manageable set of realizable behaviors the system can exhibit. The subset is selected such that a performance controller, posed as a Markov decision process, has the greatest potential to optimize system performance.

In this paper, we seek to develop more tractable methods of identifying process completing sequences for certain subclasses. More specifically, we define a special case of G-AMG, called G-AMG_A, which models a RAS comprising only “assembly” or merging operations. For RAS modeled by G-AMG_A’s, we develop two necessary conditions for quasi-liveness which provide quick tests. We also develop a polynomial net reduction algorithm that can be used to compute resource levels sufficient to assure quasi-liveness. We then turn our attention to the more restricted subclass of G-AMG_A, G-AMG_ASU , in which resource allocation is of the single-unit type. For this class, we develop resource bounds that guarantee polynomial quasi-liveness. We also present a polynomial algorithm for computing resource-feasible sequences when the resource bounds are met.

We organize the remainder of the paper as follows. Section 2 presents and discusses our A/D-RAS model. Section 3 develops the necessary conditions, the sufficient condition, and the net reduction algorithm for generating a process completing sequence for the G-AMG_A. Section 4 develops sufficient resource bounds along with a polynomial algorithm for generating process completing sequences in assembly systems with single unit resource allocation, G-AMG_ASU. Finally, Section 5 provides concluding remarks and discusses future research.

2. The G-AMG Model for the A/D-RAS

References [9, 12] formally define the G-AMG structure for the A/D-RAS. For completeness, the Appendix repeats this definition. Figure 1 provides an example of a G-AMG process net.

Figure 1 

Process net with needs for three resource types.

Note from Figure 1 that the net has an initial place, 𝑝₀, marked with a single token. This represents the uninitiated process. The initial transition, 𝑡_𝐼, serves as the order release transition, which initiates production of the five subprocesses. The places of 𝑡_𝐼•, call this set 𝑃_𝐼, hold the released subprocess orders. No resources are allocated to subprocesses in 𝑃_𝐼, that is, 𝑡_𝐼 merely releases orders for the subprocesses it does not allocate resources. This is indicated by the zero need vector associate with places in 𝑃_𝐼.

We use 𝑃_𝑆 to represent the set of places that model processing operations, typically those with nonzero resource need, and 𝑇_𝑆 to represent those transitions that allocate-deallocate resources. Thus, resource places are only connected to transitions in 𝑇_𝑆. Note that the sequential logic underlying the execution of the set of subprocesses is expressed by the induced subnet 𝑃_𝑆∪𝑇_𝑆.

Places of 𝑃_𝑆 are labeled with resource need for three resource types. We do this to simplify the figure. In fact, each resource type has its own place (the set of resource places is 𝑃_𝑅) and is marked with a number of tokens representing its capacity (we will denote the capacity or resource, 𝑟_𝑖, as 𝐶_𝑖). Consider Figure 2, illustrating the connectivity for resource 𝑟₁. The weight 𝑊(𝑟₁,𝑡₁)=1 represents the number of units of 𝑟₁ requested by the subprocess at 𝑡₁. The needs of a process place 𝑝∈𝑃_𝑠 with respect to some resource 𝑟_𝑖∈𝑃_𝑅, are expressed by the value of 𝑢_𝑖(𝑝), where 𝑢_𝑖 is the 𝑝-semiflow introduced by item 5 of Definition A.11.

Figure 2 

Token flow relation for resource 1.

Note that resource types support the execution of the different requesting subprocesses in a reusable fashion, that is, their utilization does not diminish their capacity.

Firing of 𝑡₇∈𝑇_𝑆represents the completion of the process. This event deallocates all resources and places a token in the final completion place, 𝑝_𝐹∈𝑃_𝐹. When this happens, the final transition, 𝑡_𝐹, which signals process completion, is allowed to fire and a new process release is enabled. Only places of 𝑃_𝐹 provide input to 𝑡_𝐹,𝑡_𝐹 is the only input of 𝑝₀, and 𝑝₀ is the only output of 𝑡_𝐹. Also, 𝑝₀ is the only input of 𝑡_𝐼, and 𝑡_𝐼 is the only output of 𝑝₀. Finally, 𝑡_𝐼 is the only input of places in 𝑃_𝐼, and these places connect to transitions in 𝑇_𝑆.

Since the process net (without resource places) is a marked graph, each place in {𝑝₀}∪𝑃_𝐼∪𝑃_𝑆∪𝑃_𝐹 has exactly one input and one output. This implies that processes can exhibit concurrency and synchronization but not choice. To be well-defined, we require that the process net be strongly connected. Finally, we will say that 𝑃={𝑝₀}∪𝑃_𝐼∪𝑃_𝑆∪𝑃_𝐹, 𝑇={𝑡_𝐼,𝑡_𝐹}∪𝑇_𝑆, 𝑁=𝑃∪𝑇 and 𝑁_𝑅=(𝑃∪𝑃_𝑅)∪𝑇. To summarize, we have the following notation.𝑝₀: Initial process place. The initial marking of 𝑝₀ specifies the maximum number of concurrently  executing processes.𝑃_𝐼: Places that hold subprocesses ready to begin processing. 𝑃_𝑆: Places where processing occurs. These typically have associated resource needs. 𝑃_𝐹: Places holding the completed process. 𝑃_𝑅: The set of resource places. 𝑃:{𝑝₀}∪𝑃_𝐼∪𝑃_𝑆∪𝑃_𝐹, all places except resource places. 𝑡_𝐼: The “order release” transition. 𝑇_𝑆: Transitions that allocate-deallocate resources and that synchronize, merge, or split subprocesses.𝑡_𝐹: The “process completion” transition. 𝑇:{𝑡_𝐼,𝑡_𝐹}∪𝑇_𝑆 the set of transitions. 𝑊(𝑟,𝑡): The number of units of resource 𝑟 requested at transition 𝑡. 𝑁:𝑃∪𝑇, the process net without resources. 𝑁_𝑅:(𝑃∪𝑃_𝑅)∪𝑇, the process net with resources.

As previously stated, the Appendix (Definition A.11) provides the formal definition.

As mentioned in the introduction, assessing the quasi-liveness of the G-AMG is NP-complete [10]. Thus, determining whether or not a given process has a sequence of transition firings (resource allocations) that enables 𝑡_𝐹 requires super-polynomial computation in the general case. Detailed discussions on quasi-liveness and related issues for the general case can be found in [12, 14].

In this paper, we investigate live resource allocation for assembly systems only; that is, we impose that for all 𝑡∈𝑇_𝑆⊆𝑁_𝑅, 𝑡•∩𝑃_𝑆 is a singleton. In Section 3, we develop conditions that provide quickly computable tests on quasi-liveness. In Section 4, we develop polynomial methods for resolving quasi-liveness and generating feasible resource allocation sequences for assembly systems with single unit resource allocation.

3. The G-AMG_A Model for the A-RAS

This section develops results for the subclass, referred to as G-AMG_A, of A/D-RAS systems restricted to assembly only (A-RAS). In other words, systems in G-AMG_A⊆ G-AMG have subprocess merging but no splitting. For this subclass of systems, 𝑁 is restricted as follows: for all 𝑡∈𝑇_𝑆, |𝑡•∩𝑃_𝑆|=1. Thus, a transition (other than 𝑡_𝐼) can perform no splitting operation; that is, there is no disassembly. For this subclass, we develop a set of quick tests for quasi-liveness based on necessary conditions and sufficient conditions. The necessary conditions are based on local tests of “place concurrence” for each synchronizing transition. If these conditions are not met, then the net is not quasi-live. If these tests do not indicate lack of quasi-liveness, we then perform a polynomial sufficiency test, that, if met, guarantees quasi-liveness and provides resource enabled execution sequences.

3.1. Necessary Conditions for A-RAS

Consider an 𝑁_𝑅. Let 𝑇_Synch be the set of transitions that synchronize subprocesses, that is, 𝑇_Synch={𝑡∈𝑇_𝑆∶|•𝑡∩𝑃_𝑆|>1}. For example, in Figure 1, 𝑇_Synch={𝑡₅,𝑡₆,𝑡₇}. We note that for each 𝑡∈𝑇_Synch, all places in •𝑡∩𝑃_𝑆 must be simultaneously marked for synchronization to occur. Further, there must exist sufficient remaining unallocated resources to fire the synchronization once these places are marked. For example, in Figure 1, for 𝑡₅ to be process enabled, it is necessary that the three subprocesses synchronized at 𝑡₅ are simultaneously allocated a total of three units of resource type, 𝑟₂. To resource enable 𝑡₅, one additional unit of 𝑟₂ is required. Thus, if the capacity of 𝑟₂ is less than three, 𝑡₅ cannot be process enabled, and if the capacity of 𝑟₂ is less than four, 𝑡₅ cannot be both process and resource enabled. Thus, as illustrated by this example, if there exists 𝑡∈𝑇_Synch and resource, 𝑟_𝑖, such that 𝑊(𝑟_𝑖,𝑡)+∑_{𝑝∈•𝑡∩𝑃𝑆}𝑢_𝑖(𝑝)>𝐶_𝑖, where 𝐶_𝑖 is the capacity of 𝑟_𝑖, then 𝑁_𝑅 cannot be quasi-live.

This is our first necessary condition that resource capacities must be sufficient to be both process enabled and resource enabled 𝑡∈𝑇_Synch.

Further, note that transitions 𝑡₅ and 𝑡₆ must be fired to process-enable 𝑡₇. Since we fire only one transition at a time, these must be fired in some order. Suppose 𝑡₆ is fired before 𝑡₅. Then the subprocess at place 𝑡₆•∩𝑃_𝑆 will be assembled and holding two units of 𝑟₃ after firing 𝑡₆. Then to fire 𝑡₅, subprocesses at •𝑡₅∩𝑃_𝑆 will need to be holding five units of 𝑟₃. Thus, 𝑟₃ must have at least seven units of capacity if 𝑡₆ fires before 𝑡₅.

On the other hand, if 𝑡₅ is fired before 𝑡₆, then the subprocess at place 𝑡₅•∩𝑃_𝑆 will be assembled and holding two units of 𝑟₃. Then to fire 𝑡₆, the subprocess at •𝑡₆∩𝑃_𝑆 will need to be holding three units of 𝑟₃. Thus, 𝑟₃ must have at least five units of capacity if 𝑡₅ fires before 𝑡₆. Clearly, if 𝑟₃ has capacity four, the net is not quasi-live. If 𝑟₃ has capacity five or six, 𝑡₅𝑡₆ is resource enabled but 𝑡₆𝑡₅ is not. If 𝑟₃ has capacity seven or greater, both sequences are resource enabled.

More generally, suppose 𝑡∈𝑇_Synch has 𝐾 subprocess input places, that is,  𝐾=|•𝑡∩𝑃_𝑆|. Since 𝑁 is a marked graph, each 𝑝∈•𝑡∩𝑃_𝑆 will have only one input transition. Since 𝑁 is assembly only, each 𝑝∈•𝑡∩𝑃_𝑆 will have a unique input transition. Thus, to process enable 𝑡, these 𝐾 transitions will have to be fired in some order.

Let •𝑡∩𝑃_𝑆 = {𝑝₍₁₎,𝑝₍₂₎,…,𝑝_(𝐾)} and let ••𝑡={𝑡₍₁₎,𝑡₍₂₎,…,𝑡_(𝐾)}, where •𝑝₍₁₎={𝑡₍₁₎}, •𝑝₍₂₎={𝑡₍₂₎}, and so forth. Firing 𝑡₍₁₎ marks 𝑝₍₁₎, firing 𝑡₍₂₎ marks 𝑝₍₂₎, and so forth. When {𝑝₍₁₎,𝑝₍₂₎,…,𝑝_(𝐾)} are all marked, 𝑡 is process enabled. With unlimited resources, there are 𝐾! possible firing sequences for {𝑡₍₁₎,𝑡₍₂₎,…,𝑡_(𝐾)} that process-enable 𝑡 (assuming each is fired only once). However, with finite resource capacities, some (possibly all) of the firing sequences might be infeasible. For example, in Figure 1, if 𝑟₃ has capacity six, then the firing sequence 𝑡₆𝑡₅ is not possible, although 𝑡₅𝑡₆ is.

Let 𝜎_𝑘 be the set of partial firing sequences of {𝑡₍₁₎,𝑡₍₂₎,…,𝑡_(𝐾)} of length 𝑘≤𝐾 (again assuming that each transition will occur at most once in any sequence of 𝜎_𝑘). Note that 𝜎∈𝜎_𝑘 marks 𝑘 places of •𝑡∩𝑃_𝑆 and leaves 𝐾−𝑘 unmarked. If there exists 𝑘<𝐾 such that for every marked 𝑘-subset of {𝑝₍₁₎,𝑝₍₂₎,…,𝑝_(𝐾)}, all input transitions to the unmarked (𝐾−𝑘)-complement are resource disabled, then 𝑁_𝑅 cannot be quasi-live.

Putting more formally, let 𝑆^𝑘 be a 𝑘-subset of {𝑝₍₁₎,𝑝₍₂₎,…,𝑝_(𝐾)}, that is, 𝑆^𝑘⊆{𝑝₍₁₎,𝑝₍₂₎,…,𝑝_(𝐾)} such that |𝑆^𝑘|=𝑘. Note that there are ^{|•𝑡∩𝑃𝑆|𝑘} total 𝑘-subsets of •𝑡∩𝑃_𝑆={𝑝₍₁₎,𝑝₍₂₎,…,𝑝_(𝐾)}. If ∃𝑘<𝐾 such that for all 𝑆^𝑘⊆•𝑡∩𝑃_𝑆, for all 𝑝∈(S^𝑘)^𝑐=(•𝑡∩𝑃_𝑆)⧵𝑆^𝑘, ∃𝑟_𝑖 such that ∑_{𝑝∈𝑆𝑘}𝑢_𝑖(𝑝)+𝑊(𝑟_𝑖,•𝑝)>𝐶_𝑖, then 𝑁_𝑅 cannot be quasi-live.

This is our second necessary condition that resource capacities must be sufficient to fire all the input transitions to subprocess input places of 𝑡∈𝑇_Synch.

Algorithm 1 checks these necessary conditions. The algorithm starts with a For loop that tests every synchronization transition for violations of the two necessary conditions. The first check is for necessary condition 1, where the resources required to process-enable plus the resources required to resource-enable the synchronization are compared to the resource capacities. If a violation is found, then the net cannot be quasi-live, and the algorithm terminates by returning not quasi-live.

For every 𝑡∈𝑇Synch  //Check for violations of the first necessary condition  Find 𝑟𝑖 such that 𝑊(𝑟𝑖,𝑡)+∑𝑝∈•𝑡∩𝑃𝑆𝑢𝑖(𝑝)>𝐶𝑖  If successful, return Not Quasi-live  //Check for violations of the second necessary condition  Else 𝑘=1   While 𝑘<𝐾=|•𝑡∩𝑃𝑆|    subset_count =0    For each 𝑆𝑘⊆•𝑡∩𝑃𝑆     place_count =0     For each 𝑝∈(𝑆𝑘)𝑐      Find 𝑟𝑖𝑠𝑡∑𝑝∈𝑆𝑘𝑢𝑖(𝑝)+𝑊(𝑟𝑖,•𝑝)>𝐶𝑖      If successful, place_count++     End For     If place_count = |(𝑆𝑘)𝑐|, subset_counter++    End For    If subset_count = (|•𝑡∩𝑃𝑆|𝑘), return Not Quasi-live    𝑘++   End While  End For  Return Unknown

Algorithm 1 

If no violation of the first necessary condition is found, then the algorithm initiates a While loop for testing the second condition. The first step is to initialize a subset counter, which, for the given synchronization transition, counts the number of 𝑘-subsets of the process input places that violate the second necessary condition. If it found that all 𝑘-subsets violate the second necessary condition, that is, subset_count = total number of 𝑘-subsets, then the algorithm terminates by returning not quasi-live.

Note that the inner For loop determines whether a given 𝑘-subset violates the second necessary condition or not. It does this by checking all the places in the (𝐾-𝑘)-complement to see if their input transitions are resource enabled. If none is, then none of these places can be marked, and the synchronization cannot be process enabled by first marking the 𝑘-subset and then firing the input transitions of the (𝐾-𝑘)-complement. If this is true for a 𝑘-subset, then that 𝑘-subset violates the second condition and the counter, subset_count, is incremented. Again, if we find 𝑘<𝐾such that all 𝑘-subsets violate the second necessary condition, that is, subset_count = total number of 𝑘-subsets, then the algorithm terminates by returning not quasi-live.

Consider an example assembly system depicted in Figure 3. Assume that ⟨𝐶₁,𝐶₂,𝐶₂⟩ = ⟨2,4,1⟩. We have both 𝑡₁₀ and 𝑡₁₂ in 𝑇_Synch. Checking 𝑡₁₀ for the first necessary condition, we have 0+(0+0+1)=1≤2=𝐶₁for𝑟₁,2+(1+0+0)=3≤4=𝐶₂ for 𝑟₂, and 0+(0+1+0)=1≤1=𝐶₃for𝑟₃, resulting in no violation. A similar check finds that 𝑡₁₂ does not violate the first necessary condition. We now check 𝑡₁₀ for the second necessary condition. For 𝑆¹={𝑝₃}, we have (0)+0=0≤2=𝐶₁ and (0)+1=1≤2=𝐶₁ for 𝑟₁, (1)+0=1≤4=𝐶₂ and (1)+0=1≤4=𝐶₂ for 𝑟₂, and (0)+1=1≤1=𝐶₃ and (0)+0=0≤1=𝐶₃ for 𝑟3. Hence, there is no violation. Similar checks for 𝑆¹={𝑝₆} and 𝑆¹={𝑝₉} reveal that there is no violation. For 𝑆²={𝑝₃,𝑝₆}, we have(0+0)+1=1≤2=𝐶₁ for 𝑟₁, (1+0)+0=1≤4=𝐶₂ for 𝑟₂, and (0+1)+0=1≤1=𝐶₃ for 𝑟₃; as a result, the condition is not violated. Similarly, 𝑆²={𝑝₃,𝑝₉} and 𝑆²={𝑝₆,𝑝₉} yield no violation. Therefore, 𝑡₁₀ does not violate the second necessary condition. Likewise, 𝑡₁₂ does not violate the second necessary condition either.

Figure 3 

Example assembly system.

We note that Algorithm 1 enumerates all subsets of the input places for each synchronization transition, and thus, in the strictest sense, this check is of exponential complexity. However, we expect that the number of subprocesses combined at any synchronization will be sufficiently small so that the total computation of Algorithm 1 will be quite small in comparison to the complete enumeration of the reachability graph in [12, 14], and therefore the check is worthwhile.

If no violations of either of the necessary conditions are found, then the quasi-liveness remains unverified that is, we cannot say whether the net is quasi-live or not. In the following section, we will develop a sufficient condition for quasi-liveness and an algorithm, for generating a process completing sequence based on this sufficient condition.

3.2. Sufficient Condition Test for Quasi-Liveness of the A-RAS

This subsection develops a sufficiency test for the G-AMG_A model. This test makes use of reductions performed on two types of structures contained in the G-AMG_A. In Figure 3, consider the three net segments: {𝑡_𝐼,𝑝₁,𝑡₁,𝑝₂,𝑡₂,𝑝₃,𝑡₁₀}, {𝑡_𝐼,𝑝₄,𝑡₄,𝑝₅,𝑡₅,𝑝₆,𝑡₁₀}, and {𝑡_𝐼,𝑝₇,𝑡₇,𝑝₈,𝑡₈,𝑝₉,𝑡₁₀}. These three represent the sequential processing steps of the three subprocesses marking places {𝑝₁,𝑝₄,𝑝₇}⊆𝑃_𝐼 that synchronize at 𝑡₁₀. Any interaction between the three subprocesses is strictly limited to resource competition. Otherwise their processing up to 𝑡₁₀ is independent, possibly concurrent, depending on resource capacities.

We note the following.(1)The subprocess of 𝑝₁ requires a total allocation of ⟨1,1,0⟩in order to reach 𝑝₃, where it will release the unit of 𝑟₁ and will hold the unit of 𝑟₂.(2)The subprocess of 𝑝₄ requires a total allocation of ⟨0,1,1⟩ in order to reach 𝑝₆, where it will release the unit of 𝑟₂ and will hold the unit of 𝑟₃.(3)The subprocess of 𝑝₇ requires a total allocation of ⟨1,0,1⟩in order to reach 𝑝₉, where it will release the unit of 𝑟₃ and will hold the unit of 𝑟₁.

Thus, if we have sufficient resources to simultaneously allocate ⟨1,1,0⟩ to the first subprocess, ⟨0,1,1⟩to the second, and ⟨1,0,1⟩to the third, then we are sure that the three subprocesses can reach the synchronization stage. Thus, we say that if ⟨𝐶₁,𝐶₂,𝐶₂⟩≥⟨1,1,0⟩ + ⟨0,1,1⟩ + ⟨1,0,1⟩ = ⟨2,2,2⟩, then resource capacities are sufficient to process-enable the synchronization at 𝑡₁₀.

We refer to a structure such as {𝑡_𝐼,𝑝₁,𝑡₁,𝑝₂,𝑡₂,𝑝₃,𝑡₁₀} as a Type-I structure; that is, a Type-I structure is a segment ⟨𝑡_𝐼, 𝑝₍₁₎, 𝑡₍₁₎, 𝑝₍₂₎, 𝑡₍₂₎, …, 𝑡_(𝑘−1), 𝑝_(𝑘), 𝑡⟩ of 𝑁, where(1)𝑝₍₁₎∈𝑡_𝐼•,(2){𝑝₍₁₎,…,𝑝_(𝑘)}⊆𝑃(recall,𝑃={𝑝₀}∪𝑃_𝐼∪𝑃_𝑆∪𝑃_𝐹), (3)•𝑡_(𝑗)∩𝑃={𝑝_(𝑗)}, (4)𝑡∈𝑇_Synch, (5)𝑘>2.

The first condition states that 𝑝₍₁₎ is an output place of 𝑡_𝐼; the second states that all places are nonresource places; the third states that none of the intermediate transitions are synchronizations; the fourth states that the last transition is a synchronization; and the last states there are at least three places in the structure.

Thus, a Type-I structure of 𝑁 is a path in 𝑁 with at least three places that begins with 𝑡_𝐼, ends with a synchronization, and has the property that all intermediate transitions are not synchronizations.

Now, consider the Type-I structure, {𝑡_𝐼,𝑝₁,𝑡₁,𝑝₂,𝑡₂,𝑝₃,𝑡₁₀}, in Figure 3. Suppose we reduce it as follows:(1)delete 𝑝₂ and 𝑡₂ and all corresponding edges;(2)insert edge ⟨𝑡₁,𝑝₃⟩;(3)set the resource need vector associated with 𝑝₃ to the component-wise maximum of the need vectors of all places in the Type-I structure, that is, the component-wise maximum of {⟨0,0,0⟩;⟨1,0,0⟩;⟨0,10⟩} = ⟨1,1,0⟩.

Applying this reduction to the three Type-I structures in the example yields the resulting net shown in Figure 4. Note that the net now contains no Type-I structure.

Figure 4 

Resulting net with Type-I reductions.

More formally, let 𝜌₁ represent a Type-I reduction on net 𝑁, and let 𝜌₁(𝑁) be the resulting net. Then 𝜌₁ applies the following actions to 𝑁.

Resource Bound Update
For each Type-I structure ⟨𝑡_𝐼,𝑝₍₁₎,𝑡₍₁₎,…,𝑡_(𝑘−1),𝑝_(𝑘),𝑡⟩, assign Ψ_𝑖(𝑝_(𝑘))=max{𝑢_𝑖(𝑝_(𝑗))∶𝑗=1…𝑘}, 𝑖=1…|𝑃_𝑅|, and let Ψ_𝑘 denote the vector⟨Ψ_𝑖(𝑝_𝑘)∶𝑖=1…|𝑃_𝑅|⟩.

Net Reduction
Delete {𝑝₍₂₎,𝑡₍₂₎,…,𝑝_(𝑘−1),𝑡_(𝑘−1)} and the associated arcs. Add arc (𝑡₍₁₎,𝑝_(𝑘)).
Note that Ψ_𝑖(𝑝_(𝑘)) retains the maximum usage of resource, 𝑟_𝑖, along the Type-I structure. Thus, the resource bound associated with the undeleted place, 𝑝_(𝑘), will be the number of units of each resource required for the subprocess to reach the synchronization transition.
We note that all Type-I structures can be found in number of steps polynomial in places and transitions. We now proceed to our second reduction.
Now consider net segments {⟨𝑡_𝐼,𝑝₁,𝑡₁,𝑝₃,𝑡₁₀⟩,⟨𝑡_𝐼,𝑝₄,𝑡₄,𝑝₆,𝑡₁₀⟩, ⟨𝑡_𝐼,𝑝₇,𝑡₇,𝑝₉,𝑡₁₀⟩} of Figure 4. We refer to this structure as a Type-II structure, that is, a set of at least two parallel segments, starting at 𝑡_𝐼, with two intermediate places, and ending at 𝑡∈𝑇_Synch.
More formally, a Type-II structure is composed of 𝑚>1 parallel segments in 𝑁 ending in 𝑡∈𝑇_Synch:1.⟨𝑡_𝐼,𝑝₍₁₁₎,𝑡₍₁₁₎,𝑝₍₁₂₎,𝑡⟩2.⟨𝑡_𝐼,𝑝₍₂₁₎,𝑡₍₂₁₎,𝑝₍₂₂₎,𝑡⟩.⋮    ⋮m.⟨𝑡_𝐼, 𝑝_(𝑚1), 𝑡_(𝑚1), 𝑝_(𝑚2), 𝑡⟩such that {𝑝₍₁₁₎,…,𝑝_(𝑚1)}⊆𝑡_𝐼• and 𝑝_(𝑖1)≠𝑝_(𝑗1)for𝑖≠𝑗.
A Type-II reduction, 𝜌₂, is similar to the Type-I reduction in that it applies a bound update and then a net reduction. We first illustrate the bound update and reduction and then state it more formally.
To understand the next bound update, consider the nets of Figure 5. Each place in (a) is labeled with resource need. To mark 𝑝₃, we require ⟨121⟩ units for resources 𝑟₁, 𝑟₂ and 𝑟₃, thus, in (b), Ψ₃=⟨121⟩. Similarly, Ψ₆=⟨223⟩ and Ψ₉=⟨412⟩ for places 𝑝₆ and 𝑝₉, respectively, as shown in (b).
Places in (b) are also labeled with their original resource needs, 𝑢₃, 𝑢₆, and 𝑢₉. Now, for 𝑝₃,𝑝₆, and 𝑝₉, consider 𝛿_𝑖(𝑝_𝑘)=Ψ_𝑖(𝑝_𝑘)−𝑢_𝑖(𝑝_𝑘). We refer to 𝛿_𝑖(𝑝_𝑘) as the “return” of resource, 𝑟_𝑖, by the corresponding subprocess. Letting let 𝛿_𝑘 denote the vector ⟨𝛿_𝑖(𝑝_𝑘): 𝑖=1⋯|𝑃_𝑅|⟩, we have 𝛿₃=⟨012⟩, 𝛿₆=⟨213⟩, and 𝛿₉=⟨410⟩, as shown in Figure 5(b).
Sort the places {𝑝₃,𝑝₆,𝑝₉} by decreasing return for 𝑟₁. Then we have ordered set ⟨𝑝₉,𝑝₆,𝑝₃⟩ since 4≥2≥0. In 5(a), if we first mark 𝑝₉, then 𝑝₆, and finally 𝑝₃ according to the firing sequence 𝜎=𝑡₅𝑡₆𝑡₃𝑡₄𝑡₁𝑡₂, the following capacity constraints must be met (note that 𝐶 is the resource capacity vector): Ψ₉ = ⟨412⟩≤𝐶, Ψ₆ + 𝑢₉ = ⟨223⟩+⟨002⟩=⟨225⟩≤𝐶, Ψ₃ + 𝑢₉ + 𝑢₆=⟨121⟩+⟨002⟩+⟨010⟩=⟨133⟩≤𝐶.
Taking the component-wise max across these constraints yields ⟨435⟩≤𝐶. Thus, ⟨435⟩ is necessary and sufficient to execute 𝜎=𝑡₅𝑡₆𝑡₃𝑡₄𝑡₁𝑡₂. We will refer to 𝜎 as a “serialized” firing sequence, since it advances the Type-I subprocesses to the synchronization transition one at a time. In other words, a serialized firing sequence does not allow parallel Type-I subprocesses to process in parallel. We refer to the computed bounds as serialized bounds.
Note that if we sort {𝑝₃,𝑝₆,𝑝₉} in any other way, say ⟨𝑝₆,𝑝₃,𝑝₉⟩, we get a different serialized firing sequence for marking the places and a different set of resource bounds (in this case, 𝑡₃𝑡₄𝑡₁𝑡₂𝑡₅𝑡₆ and ⟨533⟩, resp.). The bound for 𝑟₁ can be no smaller, although the bounds for 𝑟₂ and 𝑟₃ might be tighter. This is established by the following lemma.

(a)

(b)

Figure 5 

Example for Type-II bound update.

Lemma 1. Let 𝑝_𝑗 and 𝑝_𝑘 be two places in a Type-II structure, where 𝛿_𝑖(𝑝_𝑗) and 𝛿_𝑖(𝑝_𝑘) are the returns of resource 𝑟_𝑖for 𝑝_𝑗 and 𝑝_𝑘. If 𝛿_𝑖(𝑝_𝑗)≥𝛿_𝑖(𝑝_𝑘), then max(Ψ_𝑖(𝑝_𝑘),Ψ_𝑖(𝑝_𝑗)+𝑢_𝑖(𝑝_𝑘))≥max(Ψ_𝑖(𝑝_𝑗),Ψ_𝑖(𝑝_𝑘)+𝑢_𝑖(𝑝_𝑗)).

Before going to the proof, note (recall) the following:(1)𝑢_𝑖(𝑝_𝑗) is the need (number of units held) of 𝑟_𝑖at 𝑝_𝑗;(2)Ψ_𝑖(𝑝_𝑘) is the maximum need for 𝑟_𝑖 along the Type-I structure leading to 𝑝_𝑘;(3) given that the 𝑗th subprocess has advanced to 𝑝_𝑗, Ψ_𝑖(𝑝_𝑘) + 𝑢_𝑖(𝑝_𝑗) is a lower bound on the number of units of 𝑟_𝑖 required to advance the 𝑘th subprocess from its place in 𝑃_𝐼 to 𝑝_𝑘;(4) given that the 𝑗th and 𝑘th subprocesses are both at their initial places in 𝑃_𝐼, max(Ψ_𝑖(𝑝_𝑗), Ψ_𝑖(𝑝_𝑘) + 𝑢_𝑖(𝑝_𝑗)) is a lower bound on the number of units of 𝑟_𝑖 required to first advance the 𝑗th subprocess to 𝑝_𝑗 and then the 𝑘th subprocess to 𝑝_𝑘.

Proof. By assumption 𝛿_𝑖(𝑝_𝑗)≥𝛿_𝑖(𝑝_𝑘). Further, Ψ_𝑖(𝑝_𝑗)≥𝛿_𝑖(𝑝_𝑗), since the jth subprocess cannot return more of 𝑟_𝑖 than it is allocated.Then,Ψ_𝑖(𝑝_𝑗)−𝛿_𝑖(𝑝_𝑘)≥0;Ψ_𝑖(𝑝_𝑗)−Ψ_𝑖(𝑝_𝑘)+𝑢_𝑖(𝑝_𝑘)≥0;Ψ_𝑖(𝑝_𝑗)+𝑢_𝑖(𝑝_𝑘)≥Ψ_𝑖(𝑝_𝑘).   Thus, max(Ψ_𝑖(𝑝_𝑘),Ψ_𝑖(𝑝_𝑗)+𝑢_𝑖(𝑝_𝑘))=Ψ_𝑖(𝑝_𝑗)+𝑢_𝑖(𝑝_𝑘).Now, since 𝑢_𝑖(𝑝_𝑘)≥0, we have Ψ_𝑖(𝑝_𝑗)+𝑢_𝑖(𝑝_𝑘)≥Ψ_𝑖(𝑝_𝑗);andΨ_𝑖(𝑝_𝑗)+𝑢_𝑖(𝑝_𝑘)=Ψ_𝑖(𝑝_𝑗)+Ψ_𝑖(𝑝_𝑘)−𝛿_𝑖(𝑝_𝑘);Ψ_𝑖(𝑝_𝑗)+𝑢_𝑖(𝑝_𝑘)≥Ψ_𝑖(𝑝_𝑗)+Ψ_𝑖(𝑝_𝑘)−𝛿_𝑖(𝑝_𝑗);(since𝛿_𝑖(𝑝_𝑗)≥𝛿_𝑖(𝑝_𝑘))Ψ_𝑖(𝑝_𝑗)+𝑢_𝑖(𝑝_𝑘)≥Ψ_𝑖(𝑝_𝑘)+𝑢_𝑖(𝑝_𝑗).Thus,max(Ψ_𝑖(𝑝_𝑘),Ψ_𝑖(𝑝_𝑗)+𝑢_𝑖(𝑝_𝑘))≥max(Ψ_𝑖(𝑝_𝑗),Ψ_𝑖(𝑝_𝑘)+𝑢_𝑖(𝑝_𝑗)).

The point is to show that if we advance the subprocesses serially; that is, one at a time, from their places in 𝑃_𝐼 to their synchronization transition, in order of decreasing return of 𝑟_𝑖, then we will minimize the need for 𝑟_𝑖 in the serial advancement.

We can now formally state the bound update and net reduction. To understand the subscripts, please refer to the definition of a Type-II structure given above. Our approach is to identify a critical resource, 𝑟_𝑐, perhaps one that is most constraining or most expensive, and compute bounds for Type-II reductions using the returns for 𝑟_𝑐 as a sorting key in ordering the corresponding subprocesses.

Resource Bound Update for Critical Resource, 𝑟_𝑐
For a Type-II structure Let 𝛿_𝑖(𝑝_(𝑗2))=Ψ_𝑖(𝑝_(𝑗2))−𝑢_𝑖(𝑝_(𝑗2)), 𝑗=1,…,𝑚, 𝑖=1,…,|𝑃_𝑅| Sort {𝑝₍₁₂₎⋯𝑝_(𝑚2)} by decreasing 𝛿_𝑐(𝑝_(𝑗2)) Let Γ=⟨𝑝¹,…,𝑝^𝑚⟩ be the sorted set For 𝑖=1,…,|𝑃_𝑅|  Set Ψ_𝑖(𝑝₍₁₂₎) to max{Ψ_𝑖(𝑝^𝑡)+∑^{𝑡−1𝑗=1}𝑢_𝑖(𝑝^𝑗)∶𝑡=1,…,𝑚} End ForEnd For

Net Reduction
Delete {𝑝₍₂₁₎,𝑡₍₂₁₎,𝑝₍₂₂₎;…;𝑝_(𝑚1),𝑡_(𝑚1),𝑝_(𝑚2)} and the associated arcs.
Subsequently, let 𝜌₂(𝑁) denote the net resulting from a Type-II reduction having been applied to 𝑁; that is, in 𝜌₂(𝑁) all Type-II structures have been reduced. Clearly, all Type-II structures in a net can be found in number of steps polynomial in places and transitions.
Let us now apply a Type-II reduction to the net of Figure 4. Assuming that 𝑟₁ is the critical resource, we obtain the resulting net depicted in Figure 6 (note that a new Type I structure has emerged).
Lemma 2 guarantees the computed bounds are sufficient for some serialized firing sequence.

Figure 6 

Resulting net with a Type-II reduction.

Lemma 2. Suppose 𝑁∈G-AMG_Awith 𝑚 Type-I structures connecting 𝑡_𝐼 and 𝑡_𝑗∈𝑇_Synch, ⟨𝑡_𝐼,𝑝₍₁₁₎,𝑡₍₁₁₎…𝑝_(1𝑘),𝑡_𝑗⟩, ⟨𝑡_𝐼,𝑝₍₂₁₎,𝑡₍₂₁₎…𝑝_(2𝑛),𝑡_𝑗⟩, …, and ⟨𝑡_𝐼,𝑝_(𝑚1),𝑡_(𝑚1)…𝑝_(𝑚𝑝),𝑡_𝑗⟩. Then Ψ_(1𝑘)={Ψ_ℎ(𝑝_(1𝑘))∶ℎ=1,…,|𝑃_𝑅|} in 𝜌₂𝜌₁(𝑁) is a sufficient resource level to enable a firing sequence of 𝑁 that marks {𝑝_(1𝑘),𝑝_(2𝑛),…,𝑝_(𝑚𝑝)}.

Proof. It is clear that Ψ_(1𝑘) in 𝜌₁(𝑁) enables 𝜎₁=𝑡₍₁₁₎𝑡₍₁₂₎…𝑡_(1,𝑘−1) in 𝑁, Ψ_(2𝑛) in 𝜌₁(𝑁) enables 𝜎₂=𝑡₍₂₁₎𝑡₍₂₂₎…𝑡_(2,𝑛−1) in 𝑁, and so forth. Now 𝜌₁(𝑁) will contain Type-II structure {⟨𝑡_𝐼,𝑝₍₁₁₎,𝑡₍₁₁₎,𝑝_(1𝑘),𝑡_𝑗⟩,⟨𝑡_𝐼,𝑝₍₂₁₎,𝑡₍₂₁₎,𝑝_(2𝑛),𝑡_𝑗⟩,…,⟨𝑡_𝐼,𝑝_(𝑚1),𝑡_(𝑚1),𝑝_(𝑚𝑝),𝑡_𝑗⟩}. Before doing the Type-II reduction, we sort {𝑝_(1𝑘),𝑝_(2𝑛),…,𝑝_(𝑚𝑝)} based on the return of critical resource, 𝑟_𝑐 (perhaps arbitrarily chosen), 𝛿_𝑐(𝑝)=Ψ_𝑐(𝑝)−𝑢_𝑐(𝑝), and let ⟨𝑝¹𝑝²,…,𝑝^𝑚⟩ be the sorted set, in order of decreasing return. Then, if the resource capacities satisfy the following constraint set: {Ψ¹≤𝐶,Ψ²+𝑢¹≤𝐶, Ψ³+𝑢¹+𝑢² ≤ 𝐶,…,Ψ^𝑚+𝑢¹+⋯+𝑢^𝑚−1≤𝐶} in 𝑁, we can first fire 𝜎¹ and mark 𝑝¹, next fire 𝜎² and mark 𝑝², and so forth. Thus, by updating Ψ_(1𝑘) with the component-wise maximum of {Ψ¹≤𝐶, Ψ²+𝑢¹≤𝐶, Ψ³+𝑢¹+𝑢²≤𝐶,…,Ψ^𝑚+𝑢¹+⋯+𝑢^𝑚−1≤𝐶} before the Type-II reduction, we assure that Ψ_(1𝑘)in𝜌₂𝜌₁(𝑁) is a sufficient resource level to enable the firing sequence 𝜎¹𝜎²,…,𝜎^𝑚 in 𝑁.

We will now establish some necessary properties for these reductions. We note that the reductions are defined on 𝑁 and not on 𝑁_𝑅∈G-AMG_A. For the sake of brevity, we will use the notation “𝑁∈G-AMG_Aimplies 𝜌(𝑁)∈G-AMG_A” to indicate that a reduction preserves the class defining structure of the process flow. Note that in the strictest sense, if 𝑁_𝑅∈G-AMG_A and 𝑁 is the corresponding process subnet, then 𝑁∈G-AMG_A, since it represents a valid process flow with no resource requirements.

Lemma 3. 𝑁∈G-AMG_A implies 𝜌₁(𝑁)∈G-AMG_A.

Proof. Suppose 𝑁 has no Type-I structure. Then, 𝜌₁(𝑁)=𝑁_𝑖 and hence 𝑁∈G-AMG_A. Suppose 𝑁 has a Type-I structure 〈𝑡_𝐼,𝑝₍₁₎,𝑡₍₁₎,𝑝₍₂₎,…,𝑡_(𝑘−1),𝑝_(𝑘),𝑡_(𝑘)〉. In 𝜌₁(𝑁), this structure is transformed to ⟨𝑡_𝐼,𝑝₍₁₎,𝑡₍₁₎,𝑝_(𝑘),𝑡_(𝑘)⟩. Since {𝑝₍₁₎,𝑡₍₁₎, 𝑝₍₂₎,…,𝑡_(𝑘−1),𝑝_(𝑘)} are connected to the rest of 𝑁 through 𝑡_𝐼 and 𝑡_(𝑘) only, the reduction is local and all other places, transitions, and arcs remain intact. Thus 𝑁∈G-AMG_A implies 𝜌₁(𝑁)∈G-AMG_A.

Lemma 4. 𝑁∈G-AMG_A implies 𝜌₂(𝑁)∈G-AMG_A.

Proof. Suppose N has no Type-II structure. Then, 𝜌₂(𝑁)=𝑁and thus 𝑁∈G-AMG_A. Suppose 𝑁 has a Type-II structure {⟨𝑡_𝐼,𝑝₍₁₁₎,𝑡₍₁₁₎,𝑝₍₁₂₎,𝑡_𝑗⟩, ⟨𝑡_𝐼,𝑝₍₂₁₎,𝑡₍₂₁₎,𝑝₍₂₂₎,𝑡_𝑗⟩⋯⟨𝑡_𝐼,𝑝_(𝑚1),𝑡_(𝑚1),𝑝_(𝑚2),𝑡𝑗⟩}. In 𝜌₂(𝑁), the m parallel sequences are transformed into the single sequence, ⟨𝑡_𝐼,𝑝₍₁₁₎,𝑡₍₁₁₎,𝑝₍₁₂₎,𝑡_𝑗⟩. As before, all other places and transitions remain intact, and thus 𝑁∈G-AMG_A implies 𝜌₂(𝑁)∈G-AMG_A.

The above two lemmas establish that 𝜌_𝑖: G-AMG_A→G-AMG_A, 𝑖=1,2. Note that for any 𝑁∈G-AMG_A, 𝑝₀∈𝑃 and 𝑃_𝐼∪𝑃_𝑠∪𝑃_𝐹≠∅, {𝑡_𝐼,𝑡_𝐹}⊆𝑇, {(𝑝₀,𝑡_𝐼),(𝑡_𝐹,𝑝₀)}⊆𝑊, 𝑡_𝐼•≠∅, •𝑡_𝐹≠∅, and there is a path from 𝑡_𝐼 to 𝑡_𝐹. Let ℵ = {{𝑝₀,𝑝₍₁₎},{𝑡_𝐼,𝑡_𝐹},{(𝑝₀,𝑡_𝐼),(𝑡_𝐼,𝑝₍₁₎),(𝑝₍₁₎,𝑡_𝐹), (𝑡_𝐹,𝑝₀)},{1,0}}. It is clear that ℵ∈G-AMG_A and that 𝜌_𝑖 will not affect ℵ, since ℵ has no Type-1 or Type-2 structure. We refer to ℵ as “irreducible.”

Lemma 5. If 𝑁∈G-AMG_A and 𝑁≠ℵ, then there exists a Type-I or Type-II structure in 𝑁.

Proof. Suppose that 𝑁 is not irreducible. Then 𝑇_𝑆≠∅. Suppose that there exists neither Type-I structure nor Type-II structure. Then, since no Type-I structure exists, every 𝑡_𝑢∈𝑇_𝑆 is a synchronization. This implies that |𝑡_𝐼•|>1, otherwise there are no subprocesses to synchronize. Since no Type-II structure exists, for every pair (𝑝_𝑗,𝑝_𝑘)⊆𝑡_𝐼•, 𝑝_𝑗•≠𝑝_𝑘•. This implies that for every 𝑝_𝑗∈𝑡_𝐼•,∃𝑝_𝑢∉𝑡_𝐼•such that 𝑝_𝑗 and 𝑝_𝑢 synchronize at 𝑝_𝑗•. Note that there must be a path from 𝑡_𝐼 to 𝑝_𝑢, and the first node of this path, say 𝑝_𝑣, must be in 𝑡_𝐼•. Further, the synchronization transition, 𝑝_𝑣•, must fire before 𝑝_𝑢 can be marked. Thus, for every 𝑝_𝑗∈𝑡_𝐼• there exists 𝑝_𝑣∈𝑡_𝐼• such that 𝑝_𝑣• must be enabled and fired before 𝑝_𝑗• can be enabled and fired. Since 𝑡_𝐼• is finite, this implies a cyclic dependency among the transitions of 𝑡_𝐼••, which contradicts the implication of Definition A.11 that every cycle of 𝑁 passes through 𝑝₀.

With these results, the following theorems are now straightforward.

Theorem 1. For every 𝑁∈G-AMG_A, there is a finite sequence of reductions that maps N to irreducible form. Further, sequence length is 𝑂(|𝑃_𝑆|).

Proof. Suppose 𝑁∈G-AMG_A is not in irreducible form. Then, it can be reduced by the following algorithm, which will return the required sequence of reductions:Set 𝜂=𝑁,𝜌=𝜀 (empty string)While𝜂≠ℵ 𝜂=𝜌₂(𝜌₁(𝜂)) 𝜌=𝜌₂𝜌₁𝜌 (concatenation)End WhileReturn 𝜌Note that if 𝜂 is not irreducible, then 𝜌₂(𝜌₁(𝜂)) has fewer places than 𝜂. Since 𝑁 has finite places, the While will terminate in a finite number of steps not larger than |𝑃_𝑆| since each iteration will eliminate at least one place.

In the following, we will let (𝜌₂𝜌₁)^𝑛(𝑁) denote the net that results after the Type-I/Type-II reduction sequence has been applied 𝑛 times.

Theorem 2. For every 𝑁∈G-AMG_A, let𝜂=(𝜌₂𝜌₁)^𝑛(𝑁) and suppose that 𝑝_𝑗 has survived at least one update to Ψ_𝑗 without being deleted. Then Ψ_𝑗 is sufficient to enable a firing sequence in 𝑁 that enables 𝑝_𝑗•.

Proof. Suppose 𝑝_𝑗 has been involved in Type-I and Type-II structures over the n reductions and is the surviving place of those reduced structures. By the induction hypothesis, Ψ_𝑗 is sufficient to enable a firing sequence in 𝑁 that enables 𝑡_𝑗=𝑝_𝑗•, say 𝜎. Note that in 𝜂, •𝑝_𝑗={𝑡_𝐼} and 𝑝_𝑗 is in a Type-I structure (assuming 𝑡_𝑗≠𝑡_𝐹), since it is the lone input to 𝑡_𝑗 and 𝑡_𝑗•≠∅. (To see this, recall that since 𝜌₂ is performed after 𝜌₁, 𝜂 has no Type-II structures.) Let ⟨𝑡_𝐼,𝑝_𝑗,𝑡_𝑗,𝑝₍₂₎,𝑡₍₂₎…𝑡_(𝑘−1),𝑝_(𝑘),𝑡_(𝑘)⟩ be this Type-I structure in 𝜂. On subsequent Type-I reduction, Ψ_ℎ(𝑝_(𝑘))=max{Ψ_ℎ(𝑝_𝑗),Ψ_ℎ(𝑝₍₂₎),…,Ψ_ℎ(𝑝_(𝑘))}, for ℎ=1,…,|𝑃_𝑅|, then {𝑝₍₂₎,…,𝑝_{𝑖(𝑘−1)}} will be deleted, along with corresponding arcs and arc (𝑡_𝑗,𝑝_(𝑘)) will be added. Thus, Ψ_(𝑘) will be sufficient for firing sequence 𝜎𝜏=𝜎𝑡_𝑗𝑡₍₂₎…𝑡_(𝑘−1), which marks 𝑝_(𝑘).
Now, consider 𝜌₁(𝜂) with a Type-II structure {⟨𝑡_𝐼,𝑝₍₁₁₎,𝑡₍₁₁₎,𝑝₍₁₂₎,𝑡_𝑗⟩, ⟨𝑡_𝐼,𝑝₍₂₁₎,𝑡₍₂₁₎,𝑝₍₂₂₎,𝑡_𝑗⟩⋯⟨𝑡_𝐼,𝑝_(𝑚1),𝑡_(𝑚1),𝑝_(𝑚2),𝑡_𝑗⟩}, where 𝜎𝜏₍₁₎ marks 𝑝₍₁₂₎, 𝜎𝜏₍₂₎ marks 𝑝₍₂₂₎,…, and 𝜎𝜏_(𝑚) marks 𝑝_(𝑚2). Suppose we order {𝑝₍₁₂₎,𝑝₍₂₂₎,…,𝑝_(𝑚2)} by decreasing return, 𝛿_𝑗=Ψ_𝑗−𝑢_𝑗, and let {𝑝¹𝑝²,…,𝑝^𝑚} be the ordered set. Then, if we let Ψ₍₁₂₎ be the component-wise maximum of {Ψ¹,Ψ²+𝑢¹,Ψ³+𝑢¹+𝑢²,…,Ψ^𝑚+𝑢¹+⋯+𝑢^𝑚−1}, it is clear that Ψ₍₁₂₎ is sufficient to enable the firing sequence 𝜎𝜏¹𝜏²,…,𝜎𝜏^𝑚, and thus after the Type-II reduction, Ψ₍₁₂₎ for 𝑝₍₁₂₎ in 𝜌₂𝜌₁(𝜂)= (𝜌₂𝜌₁)^𝑛+1(𝜂) is sufficient to enable firing sequence 𝜎𝜏¹𝜏²,…,𝜎𝜏^𝑚 in 𝑁, which enables 𝑝₍₁₎•.

Algorithm 2 uses Type-I and Type-II reductions to compute resource levels sufficient to guarantee quasi-liveness. The algorithm starts with 𝑁, and for each process place, defines a bounding function, Ψ, for each resource. This bounding function is initialized to the resource need of the place. The While loop then updates the bounding function and applies reductions until the net is irreducible, at which point the resource bounds are returned.

Input: 𝑁∈G-AMGA and critical resource, 𝑟𝑐 Output: Serialized bounds, sequence of place markings. 𝜂=𝑁, 𝜗=∅(𝜗 is a last-in-first-out list) For 𝑝∈𝑃𝑆∪𝑃𝐼∪𝑃𝐹  Ψℎ(𝑝)=𝑢ℎ(𝑝)forℎ=1,…,|𝑃𝑅| While 𝜂≠ℵ  For each Type-I structure ⟨𝑡𝐼,𝑝(1),…,𝑡(𝑛−1),𝑝(𝑛),𝑡(𝑛)⟩ in 𝜂   Ψℎ(𝑝(𝑛))=max{Ψℎ(𝑝(1)),…,Ψℎ(𝑝(𝑛))},ℎ=1…|𝑃𝑅| End For 𝜂= 𝜌1(𝜂) For a Type-II structure {⟨𝑡𝐼,𝑝(11),𝑡(11),𝑝(12),𝑡𝑗⟩,⟨𝑡𝐼,𝑝(21),𝑡(21),𝑝(22),𝑡𝑗⟩⋯⟨𝑡𝐼,𝑝(𝑚1),𝑡(𝑚1),𝑝(𝑚2),𝑡𝑗⟩}in 𝜂  Sort {𝑝(12),𝑝(22)⋯𝑝(𝑚2)}by decreasing 𝛿𝑐 and let ⟨𝑝1,…,𝑝𝑚⟩ be the sorted set  Insert ⟨𝑝1,…,𝑝𝑚⟩ into 𝜗  For ℎ=1…|𝑃𝑅|  Set Ψℎ(𝑝(12)) to   max{Ψℎ(𝑝𝑡)+∑𝑡−1𝑗=1𝑢𝑗∶𝑡=1,…,𝑚}   End For  End For  𝜂=𝜌2(𝜂) End While Return {⟨Ψℎ∶ℎ=1…|𝑃𝑅|⟩,𝜗}

Algorithm 2 

More specifically, in the first For loop, the resource bound of the last place of each Type-I structure is updated with the maximum resource usage along the structure. Thus, the resource bound associated with the last place of each Type-I structure will be the number of units of each resource necessary for the subprocess to reach the synchronization transition. After these updates, the net reduction is applied.

After the Type-I reduction, if the net is not irreducible, at least one Type-II structure will be present. For each Type-II structure, say {⟨𝑡_𝐼,𝑝₍₁₁₎,𝑡₍₁₁₎,𝑝₍₁₂₎,𝑡_𝑗⟩, ⟨𝑡_𝐼,𝑝₍₂₁₎,𝑡₍₂₁₎,𝑝₍₂₂₎,𝑡_𝑗⟩… ⟨𝑡_𝐼,𝑝_(𝑚1),𝑡_(𝑚1),𝑝_(𝑚2),𝑡_𝑗⟩}, the second For loop first updates the resource bounds of the place in the first path, ⟨𝑡_𝐼,𝑝₍₁₁₎,𝑡₍₁₁₎,𝑝₍₁₂₎,𝑡_𝑗⟩, as illustrated and discussed above, and then deletes the other places. We note that before the bounds are computed for the Type-II reduction, the places in the Type-II structure are sorted. These sorted sets are saved on a last-in-first-out list and returned by the algorithm since they can be used to construct the serialized sequence which corresponds to the computed bounds. Thus, if the serialized bounds computed by Algorithm 2 are met, a serialized sequence can be easily constructed and, in the strictest sense, enumeration of the reachability graph need not occur. However, some additional enumeration and search might be desirable, since the serialized transition firings limit the concurrency of subprocesses.

Consider Figure 6. The resulting net is obtained after Type-I and Type-II reductions have been applied to the example assembly system of Figure 3. A Type-I structure, ⟨𝑡_𝐼,𝑝₁,𝑡₁,𝑝₃,𝑡₁₀,𝑝₁₀,𝑡₁₂⟩, can be further reduced, giving rise to ⟨𝑡_𝐼,𝑝₍₁₁₎,𝑡₍₁₁₎,𝑝₍₁₂₎,𝑡₁₂⟩ with Ψ(𝑝₍₁₂₎)=⟨132⟩, 𝑢(𝑝₍₁₂₎)=⟨030⟩ and 𝛿(𝑝₍₁₂₎)=⟨102⟩. We now have a Type-II structure: ⟨𝑡_𝐼,𝑝₍₁₁₎,𝑡₍₁₁₎,𝑝₍₁₂₎,𝑡₁₂⟩ and ⟨𝑡_𝐼,𝑝₁₁,𝑡₁₁,𝑝₁₂,𝑡₁₂⟩. Assuming that 𝑟₁ is a critical resource and hence a sorting key, the Type-II structure is reduced to ⟨𝑡_𝐼,𝑝₍₁₁₎,𝑡₍₁₁₎,𝑝₍₁₂₎,𝑡₁₂⟩ with Ψ(𝑝₍₁₂₎)=⟨241⟩. However, if 𝑟₂ is used as a sorting key and the subprocess ⟨𝑡_𝐼,𝑝₁₁,𝑡₁₁,𝑝₁₂,𝑡₁₂⟩ is executed first, then the Type-II structure is reduced to having Ψ(𝑝₍₁₂₎)=⟨343⟩. If ⟨𝐶₁,𝐶₂,𝐶₂⟩=⟨2,4,1⟩, then the first Type-II reduction guarantees quasi-liveness.

We note that it is possible to compute a looser set of resource bounds that guarantees that any precedence feasible sequence of transition firings is resource enabled by replacing the interior of the third For loop with the following statement:Ψ_ℎ𝑝₍₁₎=^𝑘_𝑗=1Ψ_ℎ𝑝_(𝑗),ℎ=1…||𝑃_𝑅||.(1)

This sum guarantees that the maximum resource needs of the corresponding subprocesses can be met simultaneously, and thus every sequence of transition firings will be resource feasible. Clearly, in this case, enumeration is not required.

4. The G-AMG_ASU Model for the ASU-RAS

This section studies the subclass of systems in G-AMG_A where net places have single unit resource need; that is G-AMG_ASU⊆G-AMG_A is the subclass of G-AMG_A where for all 𝑝∈𝑃_𝑆, ∑^𝑚ℎ=1𝑢_ℎ(𝑝)≤1, where 𝑚=|𝑃_𝑅| and 𝑢_ℎ being the 𝑝-semiflow in item 5 of Definition A.11 of the Appendix. We refer to this class as the ASU-RAS. For the ASU-RAS, we develop resource capacity bounds for which quasi-liveness is polynomial in the number of places and transitions in the underlying G-AMG_ASU. We also develop a fast method for finding sequences without developing the reachability graph of the underlying G-AMG_ASU.

More formally, we impose the following additional constraints on 𝑊 of G-AMG_A.

Definition 6. G-AMG_ASU is the class of nets obtained by placing the following constraints onG-AMG_A:(1)for all 𝑡_𝑢∈𝑃_𝐼•,∑^𝑚ℎ=1𝑊(𝑟_ℎ,𝑡_𝑖𝑢)=1,(2)for all 𝑡_𝑢∈𝑇_𝑆,∑^𝑚ℎ=1𝑊(𝑟_ℎ,𝑡_𝑢)≤1,(3)for all 𝑡_𝑢∈𝑇_𝑆,if∑^𝑚ℎ=1𝑊(𝑟_ℎ,𝑡_𝑖𝑢)=1, then 𝑊(𝑡_𝑢,𝑟_ℎ)=∑_{𝑝∈•𝑡𝑆𝑢∩𝑃}𝑢_ℎ(𝑝), for ℎ=1,…,𝑚, (4)for all 𝑡_𝑢∈𝑇_𝑆⧵•𝑃_𝐹, if ∑^𝑚ℎ=1𝑊(𝑟_ℎ,𝑡_𝑢)=0, then^𝑚_ℎ=1𝑊𝑡_𝑢,𝑟_ℎ=⎛⎜⎜⎝^𝑚_ℎ=1⎛⎜⎜⎝_{𝑝∈•𝑡𝑆𝑢∩𝑃}𝑊𝑡𝑢_ℎ(𝑝)⎞⎟⎟⎠⎞⎟⎟⎠−1,forℎ=1…𝑚,_𝑢,𝑟_ℎ∈⎧⎪⎨⎪⎩max⎧⎪⎨⎪⎩0,⎛⎜⎜⎝_{𝑝∈•𝑡𝑆𝑢∩𝑃}𝑢_ℎ(𝑝)⎞⎟⎟⎠−1_{𝑝∈•𝑡𝑆𝑢∩𝑃}⎫⎪⎬⎪⎭,𝑢_ℎ(𝑝)⎫⎪⎬⎪⎭.(2) The first constraint says that a subprocess must be allocated a resource for its first processing step. The second says that no more than one unit of one resource type may be requested at a transition. The third says that when a unit of resource is allocated at a transition, all resources held by the requesting subprocesses must be returned. Finally, the fourth says that if a transition does not allocate a resource, then the return must be exactly one unit less than the number currently held (except for transitions in •𝑃_𝐹, which release all resources). We have the following lemma.

Lemma 7. For any 𝑃∈𝑃_𝑆⧵(𝑃_𝐼∪𝑃_𝐹), the resource need vector is an 𝑚 dimensional unit vector.

Proof. For 𝑃∈𝑃_𝑆⧵(𝑃_𝐼∪𝑃_𝐹) we consider the following exhaustive cases.Case 1. Suppose 𝑢_ℎ(𝑝)=0 for ℎ=1,…,𝑚. By (1), 𝑃∉𝑃_𝐼••, but there must be a path, say 𝛾, from some 𝑃_𝑢∈𝑃_𝐼𝑡𝑜𝑃. The first transition of the path, 𝑝_𝑢•, allocates one unit of some resource to the corresponding subprocess. Thus, some transition along 𝛾 must deallocate all resources with no additional allocation. This violates (4).Case 2. Suppose 𝑢_ℎ(𝑝)=𝑘>1 for some 𝑟_ℎ. Either these 𝑘 units of 𝑟_ℎ are accumulated through at least 𝑘 transitions or they result from insufficient resource release at the firing of a synchronization transition. By (3), when a resource is allocated to a set of requesting subprocesses, all resources held by those subprocesses must be released. Thus, resources cannot be accumulated through consecutive transitions firings. By (4), if no resources are allocated at a transition, the corresponding subprocesses must still return all resources held except one. Thus, 𝑢_ℎ(𝑝)=𝑘>1 for some 𝑟_ℎ violates both (3) and (4).Case 3. Suppose 𝑢_ℎ(𝑝)=1and𝑢_𝑘(𝑝)=1. By the logic of Case 2, this is impossible.

Now, for 𝑁_𝑅∈G-AMG_ASU, the reversed subnet, 𝑁^𝑅, as defined in Section 3, has splitting (disassembly) but no merging. In the following, we use 𝑁^𝑅 to develop resource bounds that guarantee quasi-liveness and polynomial sequence enumeration for 𝑁_𝑅. Note that 𝑡_𝑢∈𝑇_Synch in 𝑁_𝑅 is a disassembly transition in 𝑁^𝑅. Let 𝑇_Split be the set of disassembly transitions in 𝑁^𝑅. Note that for 𝑡∈𝑇_Split, |•𝑡∩𝑃_Si|=1 and ∑^𝑚ℎ=1𝑢_ℎ(•𝑡∩𝑃_𝑆)=1. If 𝑢_ℎ(•𝑡∩𝑃_𝑆) = 1, we refer to 𝑟_ℎ as the “disassembly resource.” Let 𝑇^ℎ_Split={𝑡∶𝑡∈𝑇_Split and 𝑢_ℎ(•𝑡∩𝑃_𝑆)=1 in 𝑁^𝑅}, ℎ=1,…,𝑚. The set, 𝑇^ℎ_Split, collects all the disassembly transitions in 𝑁^𝑅 that have 𝑟_ℎ as the disassembly resource. Since each disassembly utilizes a single resource type, we have 𝑇^𝑢_Split∩𝑇^𝑣_Split=∅ when 𝑢≠𝑣.

For 𝑡∈𝑇_𝑆,letΓ(𝑡) be the set of transitions in 𝑇_𝑆 reachable from 𝑡 in paths of 𝑁^𝑅 not containing 𝑝₀. Note that for 𝑡∈𝑇_𝑆,Γ(𝑡) identifies reachable transitions that occur later in the disassembly process. Let 𝐿𝑇^ℎ_Split= {𝑡∶𝑡∈𝑇^ℎ_Splitand𝑇^ℎ_Split∩Γ(𝑡)=∅} and note that 𝐿𝑇^ℎ_Split represents the set of disassembly transitions that use 𝑟_ℎ as the disassembly resource but have no reachable transition (without including 𝑝₀) that does the same. That is, these are disassembly transitions, which use 𝑟_ℎ, that occur latest in the disassembly process. The following lemma guarantees that the total token count in the set of disassembly operation places requiring 𝑟_ℎ is no greater than |𝐿𝑇^ℎ_Split|.

Lemma 8. Given an 𝑁^𝑅, if 𝑀₀(𝑝0)=1 and 𝑀₀(𝑝)=0, for all 𝑝∈𝑃_𝑆∪𝑃_𝐼∪𝑃_𝐹, then for every marking 𝑀_𝑗 such that 𝑀₀[⟩𝑀_𝑗,𝑀_𝑗(•𝑇^ℎ_Split∩𝑃_𝑆)≤|𝐿𝑇^ℎ_Split|.

Proof. Let 𝑁^ be initially marked as given above. Note that 𝑁^𝑖 is a strongly connected marked graph with every circuit containing the place 𝑝₀ initially marked with exactly one token. For 𝑡_𝑗∈|𝐿𝑇^ℎ_Split|, there exists a path, from 𝑡_𝐹 to 𝑡_𝑗, say 𝜏_𝑗. Note that there exists a circuit passing through 𝑡_𝑗, say 𝛾_𝑗, such that 𝜏_𝑗 is a subpath of 𝛾_𝑗. For any other 𝑡_𝑘∈|𝐿𝑇^ℎ_Split|, 𝑡_𝑗 and 𝑡_𝑘 are mutually unreachable except through paths including 𝑝₀. As a result, 𝑡_𝑗 and 𝑡_𝑘 are not in a common circuit. This implies 𝐿𝑇^ℎ_Split circuits passing through elements of 𝐿𝑇^ℎ_Split. Further note that for 𝑡_𝑢∈𝑇^ℎ_Split⧵𝐿𝑇^ℎ_Split, ∃𝑡_𝑣∈𝐿𝑇^ℎ_Split such that 𝑡_𝑣∈Γ(𝑡_𝑢); this implies that 𝑡_𝑢 and 𝑡_𝑣 belong to a common circuit. Thus, the number of circuits in which resource 𝑟_ℎ is used as a disassembly resource is precisely 𝐿𝑇^ℎ_Split. By the fundamental property of marked graphs, 𝑀_𝑗(•𝑇^ℎ_Split∩𝑃_𝑆)≤|𝐿𝑇^ℎ_Split|.

Note that |𝐿𝑇^ℎ_Split| can be quickly and easily computed for each resource and will play an important role in developing an enumeration policy for 𝑁^𝑅. Now consider the following lemma.

Lemma 9. Given an 𝑁^𝑅, suppose 𝑀₀(𝑝₀)=1, 𝑀₀(𝑝)=0, for all 𝑝∈𝑃_𝑆∪𝑃_𝐼∪𝑃_𝐹, and that 𝑀₀[⟩𝑀_𝑘. Define induced marking 𝑀^∗𝑘 as follows: 𝑀^∗𝑘=⎧⎪⎨⎪⎩0∀𝑝∈•𝑇^Split∩𝑃_𝑆1𝑝₀𝑀_𝑘(𝑝)otherwise.(3) If marking 𝑀^∗𝑘 is free of deadly marked siphons, then 𝑀_𝑘 is free of deadly marked siphons.

Proof. We prove this result by contradiction. Let 𝑠^ be a deadly marked siphon in 𝑀_𝑘. Then, there will exist another siphon 𝑠⊆𝑠^ which is deadly marked in 𝑀_𝑘 and minimal. The structure of 𝑁^𝑅 implies that the minimal siphons containing place 𝑝₀ are the circuits of the marked graph, 𝑁^. This observation, when combined with the presumed structure for the initial marking 𝑀₀, implies that, for any marking 𝑀_𝑘∈𝑅(𝑁^𝑅,𝑀₀), 𝑝₀∉𝑠. But, the construction of 𝑀^∗𝑘 implies that 𝑠 does not increase its token content, and, therefore, it constitutes a deadly marked siphon for 𝑀^∗𝑘. The last conclusion contradicts the working assumption and concludes the proof.

The importance of the marking 𝑀^∗𝑘 is that its corresponding subprocesses are each strictly SU-RAS for at least one step. That is, any token in 𝑀^∗𝑘 is holding one unit of resource and requesting one unit of resource. When the requested unit is allocated, the held unit is released, and the token advances to its next place. The lemma guarantees that if there is no deadlock among the subprocesses of 𝑀^∗𝑘 (assuming the reduced resource capacity levels of 𝑀^∗𝑘), then there is no deadly marked siphon in 𝑀_𝑘. We will use this fact along with resource bounds to be computed from the results of Lemma 9 to develop a single step look-ahead enumeration policy for 𝑁^𝑅 that is polynomial in net size. The policy is as follows.

Enumeration Policy Φ
Let 𝜎_𝑗 be a firing sequence for 𝑁^𝑅 such that 𝑀₀[𝜎_𝑗⟩𝑀_𝑗 and suppose 𝑡_𝑢 is enabled at 𝑀_𝑗 such that 𝑀_𝑗[𝑡_𝑢⟩𝑀_𝑘. Admit the extension 𝜎_𝑗𝑡_𝑢 only if the marking 𝑀^∗𝑘 is free of deadly marked siphons.
We note that detecting whether or not a marking has a deadly marked siphon is polynomial in the size of the net and is thus very fast. However, allowing markings only if they are free of deadly marked siphons does not guarantee policy correctness since we may admit markings from which deadly marked siphons are unavoidable. For our purposes, we will define policy correctness as follows.

Definition 10. An enumeration policy is “correct” if for any marking, 𝑀_𝑗, admitted under the policy, there exists a sequence of transition firings, 𝜎_𝑗≠𝜀, such that(1)𝑀_𝑗[𝜎_𝑗⟩𝑀₀,(2) for any prefix of 𝜎_𝑗, say 𝜏_𝑘, where 𝑀_𝑗[𝜏_𝑘⟩𝑀_𝑘, 𝑀_𝑘 is admitted under the policy.We, now, are in the position to prove the following.

Theorem 3. For 𝑡_𝑗∈𝑇^ℎ_Split and ℎ=1,…,𝑚, let 𝑈𝑈^ℎ𝑗=_{𝑝∈𝑡𝑗•𝑆∩𝑃}𝑢_ℎ(𝑝),_ℎmax𝐵_ℎ=max𝑈^ℎ𝑗∶𝑡_𝑗∈𝑇^ℎ_Split,=|||LT^ℎ_Split|||+𝑈_ℎmax+2.(4) If for ℎ=1,…,𝑚, 𝐶_ℎ≥𝐵_ℎ, then Φ is correct.

Proof. Suppose that a marking, 𝑀_𝑘, is accepted by Φ. Then 𝑀^∗𝑘 contains no deadly marked siphon and thus 𝑀_𝑘 contains no deadly marked siphon. Note that in 𝑀^∗𝑘, the capacity of every resource is at least 𝑈^ℎmax+ 2, ℎ=1…𝑚. Let Π be the set of subprocesses in 𝑀_𝑘 where Π=Π_𝑁𝐷∪Π_𝐷,Π_𝑁𝐷∩Π_𝐷=∅. Π_𝐷 is the set of subprocesses at disassembly operations, that is, tokens marking •𝑇_Split∩𝑃_𝑆, and Π_𝑁𝐷 is the set of subprocesses not at disassembly.

Case 1. Suppose that Π_𝑁𝐷≠∅ in 𝑀_𝑘. Since there is no deadly marked siphon in 𝑀^∗𝑘, there is no subset of Π_𝑁𝐷 deadlocked in 𝑀^∗𝑘. Thus, ∃𝜋_𝑢∈Π_𝑁𝐷 and enabled 𝑡_𝑣∉𝑇_Split such that firing 𝑡_𝑣 allocates a unit of resource 𝑟_ℎ to 𝜋_𝑢 and causes 𝜋_𝑢 to release a unit of resource 𝑟_𝑝.
Now suppose that 𝑀_𝑘[𝑡_𝑣⟩𝑀_𝑔 and that 𝑀_𝑔 contains a deadly marked siphon. Thus, 𝑀^∗𝑔 contains a deadly marked siphon, which implies a deadlock among processes of Π_𝑁𝐷 in 𝑀^∗𝑔. Because of the resource bounds, each deadlocked subprocess of 𝑀^∗𝑔 is blocked by at least two other deadlocked subprocesses of 𝑀^∗𝑔.
To summarize, we have the following: (1) 𝑀^∗𝑘 has no deadlock among Π_𝑁𝐷, (2) 𝑀^∗𝑘[𝑡_𝑣⟩𝑀^∗𝑔, (3) 𝑡_𝑣 allocates a single unit of 𝑟_ℎ to 𝜋_𝑢 and releases a single unit of 𝑟_𝑝, (4) 𝑀^∗𝑔 has a deadlock among Π_𝑁𝐷, and (5) every deadlocked subprocess of 𝑀^∗𝑔 is blocked by at least two other deadlocked subprocesses of 𝑀^∗𝑔.
It is clear that allocating 𝑟_ℎ to 𝜋_𝑢 causes the deadlock, implying that 𝑟_ℎ is a resource involved in the deadlock. Thus, in 𝑀^∗𝑔, at least two units of 𝑟_ℎ are allocated to subprocesses in Π_𝑁𝐷, and in fact, there must be another subprocess 𝜋_𝑎∈Π_𝑁𝐷 requesting 𝑟_ℎ at 𝑡_𝑎∉𝑇_Splitin both 𝑀^∗𝑘 and 𝑀^∗𝑔. Allocating 𝑟_ℎ to 𝜋_𝑎 rather than 𝜋_𝑢, that is, 𝑀_𝑘[𝑡_𝑎⟩𝑀_𝑝 cannot result in deadlock among processes of Π_𝑁𝐷. Hence neither 𝑀^∗𝑝 nor 𝑀_𝑝 contains a deadly marked siphon.

Case 2. Suppose that Π_𝑁𝐷=∅ and Π_𝐷≠∅ in 𝑀_𝑘. There exist only subprocesses at disassembly operations. Thus, each resource has at least 𝑈^ℎmax+2 free units, ℎ=1…𝑚. Sufficient resources are available to fire any transition of 𝑇_Split. Suppose 𝑡∈𝑇_Split is enabled in 𝑀_𝑘 and that 𝑀_𝑘[𝑡⟩𝑀𝑔.𝑀^∗𝑔 contains no deadly marked siphon. To see this, note that if 𝑀_𝑔 has Π_𝑁𝐷=∅, then each resource continues to exhibit at least 𝑈^ℎmax+ 2 free units, ℎ=1…𝑚. If 𝑀_𝑔 has Π_𝑁𝐷≠∅, then each resource, 𝑟_ℎ, ℎ=1…𝑚, has at least 2 units of free capacity.

Thus, Enumeration Policy Φ guarantees resource-enabled sequences of transition firings that complete the disassembly process, 𝑁^𝑅. We are now ready to present Algorithm 3. It starts with 𝑁^𝑅 in the initial marking and generates a firing sequence that completes the disassembly by using single step look-ahead for deadly marked siphons. The most computationally intensive step is the siphon check, which can be done in polynomial time, no worse than 𝑂(|𝑃_𝑆|+|𝑇_𝑆|). By Theorem 3, the loop will require no more than |𝑇_𝑆| iterations, since every iteration will identify an admissible transition, and thus the algorithm is 𝑂(|𝑇_𝑆|²). By returning the reversed sequence, we get the resource enabled assembly sequence for the assembly net, 𝑁_𝑅. We note that the termination request computations of Algorithm 1 can easily be implemented in Algorithm 3.

Input: (𝑁𝑅,𝑀0) Output: 𝜎𝑗≠𝜀 such that 𝑀0[𝜎𝑗⟩𝑀0 Set 𝜎𝑗=𝑡𝐹, and fire 𝑡𝐹 Set 𝑀𝑗=𝑀0[𝑡𝐹⟩ Loop  Find 𝑡∈𝐸𝑡(𝑀𝑗)st𝑀𝑗[𝑡⟩𝑀𝑘,𝑀∗𝑘 contains no deadly marked   siphon   𝜎𝑗=𝜎𝑗𝑡   If 𝑀𝑘=𝑀0, return reverse (𝜎j)   Else 𝑀𝑗=𝑀𝑘 End Loop

Algorithm 3  

As an aside, we note that the converse of Lemma 9 is not true; that is, a deadly marked siphon in 𝑀^∗𝑘 does not imply a deadly marked siphon in 𝑀_𝑘. In fact, it is easy to illustrate markings which are “safe” in the sense that the firing sequence can be extended to reach 𝑀₀ but for which the induced marking exhibits a deadly marked siphon and is rejected. Thus, the Enumeration Policy Φ is suboptimal in the sense that it rejects some transition firings that lead to “safe” markings. Further, even when the capacity bounds of Theorem 3 are in place, 𝑁^𝑅 can exhibit markings with no deadly marked siphon but from which every sequence of transition firings leads to a marking with a deadly marked siphon. Thus, a policy that does single step look-ahead on the unaltered markings of 𝑁^𝑅 is not correct. Finally, we note that since Theorem 3 applies to disassembly systems, when the specified bounds are in place, quasi-liveness is guaranteed and sequence enumeration is polynomial for the class of disassembly nets G-AMG_DSU.

5. Conclusion

In this paper, we developed models and algorithms for a class of Petri nets that support resource allocation in systems with synchronization and splitting operations. Our focus was on establishing quasi-liveness and enumerating process completing sequences. This is challenging since, for this class of systems, the quasi-liveness problem is NP-complete. Our tenet is that once quasi-liveness is established and a process completing sequence is generated, previously published liveness enforcing supervisors can be used to control the operation of these systems. For the general case, we proposed a breadth-first search algorithm that generates the reachability tree and computes minimal termination requests for each marking. We discussed the complexity of this approach as well as the need for selecting a smaller set of sequences for use in supervision. We then developed two special subclasses that for systems with assembly only, and for each class established that polynomial sequence enumeration is possible if the resource capacities meet certain bounds. The first subclass was assembly with conjunctive resource allocation. For this class, we developed a net reduction algorithm that reduces the net to a minimal form and, in so doing, computes a resource sufficiency bound for “serialized” firing sequences. The second special case was that of assembly with single unit resource allocation. For this class, we developed resource bounds and an enumeration policy that guarantees a process completing sequence in polynomial time. In current and future work, we are addressing liveness enforcing supervision for assembly/disassembly systems with unreliable resources, particularly those subject to degradation.

Appendix

Definition A.11. A G-AMG is a Petri net, 𝑁=(𝑃,𝑇,𝑊,𝑀₀) such that(1)𝑃=𝑃_𝑆∪𝑃_𝐼∪𝑃_𝐹∪𝑃₀∪𝑃_𝑅, where𝑃_𝑆∩𝑃_𝐼∩𝑃_𝐹∩𝑃₀∩𝑃_𝑅=∅;(2)𝑇=𝑇_𝑆∪𝑇_𝐼∪𝑇_𝐹, where 𝑇_𝑆∩𝑇_𝐼∩𝑇_𝐹=∅;(3)𝑊∶(𝑃×𝑇)∪(𝑇×𝑃)𝑍⁺→ satisfies the following:(a)(𝑃×𝑇)∪(𝑇×𝑃)→{0,1} such that ({𝑝₀}×(𝑇_𝑆∪{𝑡_𝐼,𝑡_𝐹})) → {1} for (𝑝₀,𝑡_𝐼), and {0} otherwise. Similarly, ((𝑇_𝑆∪{𝑡_𝐼,𝑡_𝐹})×{𝑝₀})→{1} for (𝑡_𝐹,𝑝₀), and {0} otherwise,(b)({𝑡_𝐼} × 𝑃_𝐼) → {1} and ({𝑡_𝐼} × (𝑃_𝑆∪𝑃_𝐹))→{0}. Similarly, (𝑃_𝐹×{𝑡_𝐹}) →{1} while ((𝑃_𝑆∪𝑃_𝐼) × {𝑡_𝐹}) →{0},(c)(𝑃_𝑅×𝑇_𝑆) ∪ (𝑇_𝑆×𝑃_𝑅)→𝑍⁺ and (𝑃_𝑅×(𝑇_𝐼∪𝑇_𝐹)) ∪ ((𝑇_𝐼∪𝑇_𝐹)×𝑃_𝑅) →{0};(4)the net generated by 𝑃_𝑆∪𝑃_𝐼∪𝑃_𝐹∪{𝑝₀}∪𝑇_𝑆∪{𝑡_𝐼,𝑡_𝐹} is a strongly connected marked graph such that every cycle contains {𝑝_0𝑖};(5)for all 𝑟∈𝑃_𝑅, and there exists a minimal integral 𝑝-semiflow, 𝑢_𝑟, such that ‖𝑢_𝑟‖∩𝑃_𝑅={𝑟},‖𝑢_𝑟‖∩{𝑃₀∪𝑃_𝐼∪𝑃_𝐹}=∅, ‖𝑢_𝑟‖∩{𝑃_𝑆}≠∅, and 𝑢_𝑟(𝑟)=1;(6)𝑁 is pure and strongly connected.𝑀₀∶𝑃→𝑍⁺ with 𝑀₀(𝑝)≥1, for all 𝑝∈𝑃₀∪𝑃_𝑅 and 𝑀₀(𝑝)=0, otherwise.