FPGA Control Implementation of a Grid-Connected Current-Controlled Voltage-Source Inverter

<table><svg height="16.6" id="M56" style="vertical-align:-3.50804pt" version="1.1" viewbox="0 0 48.387501 16.6" width="48.387501" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
<g transform="matrix(.017,-0,0,-.017,.062,12.162)"><path d="M483 97q-42 -50 -88.5 -79.5t-68.5 -29.5q-37 0 -17 93l22 102h-2q-54 -79 -144 -149q-59 -46 -100 -46q-24 0 -43 29t-19 86q0 78 34.5 153t94.5 120q41 31 94 51.5t98 20.5q29 0 72 -9q26 -6 39 -6l2 -4q-30 -117 -67 -323q-8 -41 2 -41q16 0 79 58zM374 387
q-32 15 -73 15q-52 0 -83 -23q-48 -36 -78 -108.5t-30 -152.5q0 -33 8.5 -50.5t20.5 -17.5q31 0 107 79t99 132q15 40 29 126z" id="x1D44E"></path></g><g transform="matrix(.017,-0,0,-.017,8.664,12.162)"><path d="M452 333q0 -82 -46 -164t-116 -128q-81 -53 -158 -53q-26 0 -51 13t-37 32q-26 41 -6 134l91 431q7 40 2.5 47t-34.5 7h-33l2 25q36 4 72.5 13t58.5 15.5t28 6.5q10 0 4 -29l-91 -391h2q65 77 130 116.5t105 39.5q36 0 56.5 -32t20.5 -83zM365 316q0 76 -35 76
q-31 0 -93.5 -49t-107.5 -110q-12 -37 -17 -70q-9 -65 12 -96.5t59 -31.5q31 0 56 14q53 29 89.5 105t36.5 162z" id="x1D44F"></path></g><g transform="matrix(.017,-0,0,-.017,16.636,12.162)"><path d="M383 397q0 -32 -35 -49q-12 -6 -23 8q-37 45 -84 45t-90 -71q-40 -65 -40 -167q0 -57 22 -86t59 -29q38 0 81.5 24.5t69.5 51.5l16 -21q-44 -53 -104 -84t-109 -31q-56 0 -89.5 41t-33.5 117q0 61 30 124t79 105q33 28 81 50.5t86 22.5q34 0 59 -15.5t25 -35.5z" id="x1D450"></path></g><g transform="matrix(.017,-0,0,-.017,23.538,12.162)"><path d="M368 703l-264 -866h-60l265 866h59z" id="x2F"></path></g><g transform="matrix(.017,-0,0,-.017,30.541,12.162)"><path d="M530 686q-79 -330 -126 -595q-5 -24 4 -24q22 0 77 53l16 -24q-42 -49 -88 -78.5t-72 -29.5q-37 0 -19 83l21 99h-2q-62 -83 -153 -141q-65 -41 -97 -41q-28 0 -48 31.5t-20 91.5q0 71 32.5 144t88.5 118q36 30 94 52.5t94 22.5q38 0 68 -13l29 158q7 40 2 47.5t-38 7.5
h-35l1 26q39 4 76 13.5t58.5 17t27.5 7.5q16 0 9 -26zM387 375q-11 11 -38.5 20t-51.5 9q-45 0 -79 -23q-46 -32 -77.5 -107.5t-31.5 -143.5q0 -40 9.5 -58.5t23.5 -18.5q40 0 113.5 70t99.5 118z" id="x1D451"></path></g><g transform="matrix(.017,-0,0,-.017,39.976,12.162)"><path d="M474 429q-19 -69 -47 -222l-65 -347q-8 -49 0 -60t49 -16l26 -3l-4 -26l-246 -12l4 25l17 3q37 6 50 20.5t23 60.5l67 321h-2q-65 -79 -150 -138q-69 -47 -104 -47q-28 0 -48.5 32t-20.5 81q0 78 35 148t90 117q67 57 161 77q23 5 58 5q43 0 90 -15zM387 387
q-30 16 -75 16q-58 0 -92 -27q-49 -39 -78.5 -112t-29.5 -136q0 -34 8.5 -52.5t21.5 -18.5q40 0 109.5 63.5t103.5 115.5q16 53 32 151z" id="x1D45E"></path></g>
</svg>-transform with type 1.</table>

Journal of Control Science and Engineering

fig7

Figure 7

Figure 7: FPGA Control Implementation of a Grid-Connected Current-Controlled Voltage-Source Inverter 