A VLSI Architecture for the V-BLAST Algorithm in Spatial-Multiplexing MIMO Systems

Table 1

V-BLAST architecture comparison.

	[7]	[8]	This work
𝑛	4	4	4
Device target	ASIC	ASIC	FPGA
Transmission scheme	QPSK	16-QAM	16-QAM
Data throughput	128 Mbps	212 Mbps	265.18 Mbps
Maximum clock frequency	80 MHz	140 MHz	99.44 MHz