A Very Compact AES-SPIHT Selective Encryption Computer Architecture Design with Improved S-Box

Table 6

Implementation results.

Components	Quantity	Total	Usage
No. of slice flip flops	110	26,624	1%
No. of occupied slices	236	13,312	1%
Total no. of 4-input LUTs	428	26,624	1%
No. of LUTs used as logic	405	428	95%
No. of LUTs used as a route-thru	22	428	5%
No. of LUTs used as shift registers	1	428	~0%
No. of bonded IOBs	28	221	12%
No. of BRAMs	3	32	9%
No. of GCLKs	4	8	50%
No. of DCMs	1	4	25%