Research Letter
FPGA Implementation of Block Parallel DF-MPIC Detectors for DS-CDMA Systems in Frequency-Nonselective Channels
Table 1
Resources needed to implement PIC-based detectors with 10 users in the Xilinx XC2VP100 device.
| | XC2VP100 | MPIC (BP10-DF-MPIC) | BP5-DF-MPIC | BP2-DF-MPIC | DF-MPIC (BP1-DF-MPIC) | | Use | Percentage | Use | Percentage | Use | Percentage | Use | Percentage |
| | Number of slices | 19818/44096 | 44.94% | 21323/44096 | 48.35% | 30076/44096 | 68.21% | 33384/44096 | 75.71% | | Number of flip-flops | 30379/88192 | 34.44% | 42644/88192 | 48.35% | 60151/88192 | 68.21% | 66767/88192 | 75.71% | | Number of 4-input LUT | 39636/88192 | 44.94% | 39986/88192 | 45.34% | 39914/88192 | 45.26% | 39783/88192 | 45.11% | | Number of embedded multipliers | 290/444 | 65.32% | 290/444 | 65.32% | 290/444 | 65.32% | 290/444 | 65.32% |
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