Journal of Electrical and Computer Engineering
Volume 2010 (2010), Article ID 180296, 4 pages
doi:10.1155/2010/180296
Research Article

Distributed Arithmetic for Efficient Base-Band Processing in Real-Time GNSS Software Receivers

Grégoire Waelchli,1 Marcel Baracchi-Frei,2 Cyril Botteron,1 and Pierre-André Farine1

1Ecole Polytechnique Fédérale de Lausanne, EPFL IMT ESPLAB, Rue A.-L. Breguet 2, 2000 Neuchâtel, Switzerland
2University of Neuchatel, Switzerland

Received 26 August 2009; Accepted 1 November 2009

Academic Editor: Periasamy K. Rajan

Copyright © 2010 Grégoire Waelchli et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Linked References

  1. G. W. Heckler and J.-L. Garrison, Architecture of Reconfigurable Software Receiver, Purdue University, West Lafayette, Ind, USA, 2004.
  2. S. Charkhandeh, et al., “Implementaztion and testing of a real-time software-based GPS receiver for x86 processors,” in Proceedings of the ION National Technical Meeting (NTM '06), Monterey, Calif, USA, January 2006.
  3. B. M. Ledvina, et al., “Real-time software receiver,” US patent application no. US0227856 A1, October 2006.
  4. A. Fridman and S. Semenov, Architectures of Software GPS Receivers, Springer, Berlin, Germany, 2000.
  5. R. Andraka and A. Berkun, “FPGAs make a radar signal processor on a chip a reality,” in Proceedings of the 33rd Asilomar Conference on Signals, Systems and Computers, vol. 1, pp. 559–563, Pacific Grove, Calif, USA, October 1999. View at Publisher · View at Google Scholar
  6. B. M. Ledvina, M. L. Psiaki, S. P. Powell, and P. M. Kintner, “Bit-wise parallel algorithms for efficient software correlation applied to a GPS software receiver,” IEEE Transactions on Wireless Communications, vol. 3, no. 5, pp. 1469–1473, 2004. View at Publisher · View at Google Scholar · View at Scopus