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Journal of Electrical and Computer Engineering
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2011
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Article
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Tab 1
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Research Article
New Low-Power Tristate Circuits in Positive Feedback Source-Coupled Logic
Table 1
CMOS Tristate gates.
Gate
(ns)
Power dissipation (
W)
Power delay product (fJ)
Inverter
0.065
16.2
1.053
NAND
0.078
16.2
1.2636
NOR
0.087
16.2
1.4094