An Optimization Mechanism Intended for Static Power Reduction Using Dual-𝑉_thTechnique

Table 1

Experimental results.

Circuit	Total cells	folgSlack (ps)	Cycle time (ps)	Leakage reduction (%)
C499	146	0	1.9	5.00%
C1355	146	9	1.9	11.81%
C880	167	28	1.3	39.28%
C2670	287	33	2.0	24.50%
C3540	522	84	3.1	31.38%
C5315	616	17	2.8	29.10%
C7552	849	46	4.9	31.87%
C6288	2357	155	5.6	15.23%
Average				23.52%