697039.fig.0019a
(a)
697039.fig.0019b
(b)
697039.fig.0019c
(c)
Figure 19: The data path delay ( 𝑡 𝑑 ) distributions of rising speedup, falling speedup, rising delay, falling delay, normal rising, and normal falling cases under (a) high voltage (1.0 V), (b) medium voltage (0.85 V) and (c) low voltage (0.7 V).