Research Article
Automated Generation of Custom Processor Core from C Code
Table 5
Difference in components and parameters between respective baseline and generated design.
| Benchmark | Pipe | ALU1 | ALU2 | ALU3 | RF 2 × 1 | RF 4 × 2 | RF 6 × 3 | RF 8 × 4 | RF 16 × 8 | IDp |
| bdist2 | N | #R = 64 | #R = 64 | #R = 64 | #R = 64 | #R = 64 | #R = 64 | #R = 64 | #R = 64 | Rf 8 × 4, 3 Alu, 2 Mul | Y | #R = 32 | #R = 32 | #R = 32 | #R = 32 | #R = 32 | #R = 32 | #R = 32 | #R = 32 | Rf 8 × 4, 3 Alu, 2 Mul | Sort | N | #R = 16 | #R = 16 | #R = 16 | #R = 16 | #R = 16 | #R = 16 | #R = 16 | #R = 16 | Rf 6 × 3, 1 Alu | Y | #R = 16 | #R = 16 | #R = 16 | #R = 16 | #R = 16 | #R = 16 | #R = 16 | #R = 16 | Rf 6 × 3, 1 Alu | dct32 | N | Rf 4 × 2 | Rf 6 × 3 | Rf 8 × 4 | — | 2 Alu | 3 Alu | 3 Alu | 3 Alu | Rf 16 × 8, 4 Alu, 2 Mul | Y | Rf 4 × 2 | Rf 4 × 2 | Rf 6 × 3 | — | 2 Alu | 2 Alu | 2 Alu | 3 Alu | Rf 16 × 8, 4 Alu, 2 Mul | Mp3 | N | — | Rf 6 × 3 | Rf 8 × 4 | — | 2 Alu | 3 Alu | 3 Alu | 3 Alu | Rf 16 × 8, 4 Alu, 2 Mul | Y | Rf 4 × 2 | Rf 6 × 3 | Rf 6 × 3 | — | 2 Alu | 2 Alu | 2 Alu | 2 Alu | Rf 16 × 8, 4 Alu, 2 Mul | inv/forw 4 × 4 | N | #R = 16 | #R = 16 | #R = 16 | #R = 16 | #R = 16 | #R = 16 | #R = 16 | #R = 16 | Rf 16 × 8, 4 Alu, 1 Mul | Y | #R = 16 | #R = 16 | #R = 16 | #R = 16 | #R = 16 | #R = 16 | #R = 16 | #R = 16 | Rf 16 × 8, 4 Alu, 1 Mul |
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