Loop-Reduction LLL Algorithm and Architecture for Lattice-Reduction-Aided MIMO Detection

Table 6

FPGA implementation results and comparison.

	Virtex-4 [8]	Vertex-4 [9]	Virtex-4 [10]	Virtex-4 [This work]
LRA algorithm	RS-LLL	CLLL (modified)	CT-LLL	LR-LLL
System model	Complex	Complex	Real	Real
Slices	4805	3640	11330	4170
Antenna number	4	4	4	4
Frequency	79 MHz	140 MHz	8.7 MHz	53 MHz
Ave. cycles/matrix	14	96	5	89
Throughput (M mat/s)	5.6	1.45	1.74	0.59