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Journal of Electrical and Computer Engineering
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2013
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Article
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Fig 10
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Research Article
Low-Jitter 0.1-to-5.8 GHz Clock Synthesizer for Area-Efficient Per-Port Integration
Figure 10
Closed-loop phase noise and RMS jitter measurement at 1.244 GHz output (
GHz);
(1 kHz to 40 MHz).