Ultra-Low Leakage Arithmetic Circuits Using Symmetric and Asymmetric FinFETs

Table 11

Impact of the fin height and fin thickness on delay and leakage current in 14T full adder.

14T topology	𝐼OFF (pA)	𝑡P (ps)
ℎfin + 5%	40.40	23.99
ℎfin − 5%	36.55	24.06
ℎfin + 10%	42.32	23.93
ℎfin − 10%	34.62	24.10
𝑇si + 5%	79.94	23.85
𝑇si − 5%	18.48	24.19