Ultra-Low Leakage Arithmetic Circuits Using Symmetric and Asymmetric FinFETs

Table 15

Comparison between different scenarios of 4 : 2 asymmetric FinFET compressor.

Scenario	𝐼OFF (pA)	𝑡P (ps)	Static power * delay (zJ)	Number of transistors
1	20.36	46.94	1.14	60
2	27.23	40.86	1.33	44
3	19.35	34.52	0.80	36