A Low-Complexity Decision Feedforward Equalizer Architecture for High-Speed Receivers on Highly Dispersive Channels

Table 1

Complexity of the parallel DFFE architecture for 2-PAM and 𝑅>𝐿.

Adders	𝐿(𝑅−𝐿/2−1/2)𝑃
Registers	((𝑅−1)𝑅/2+(𝑅−𝐿)(𝐿+1)𝐿/2+(𝐿^2−1)𝐿/6)𝑃
2-to-1 Mux	𝐿(𝑅−𝐿/2−1/2)𝑃