Research Article
Asynchronous Realization of Algebraic Integer-Based 2D DCT Using Achronix Speedster SPD60 FPGA
Table 3
Configuration settings.
| Parameter | Value |
| Software version | HM-7.1rc2 | MaxCUWidth | 64 | MaxCUHeight | 64 | MaxPartitionDepth | 4 | QuadtreeTULog2MaxSize | 3 | QuadtreeTULog2MinSize | 2 | QuadtreeTUMaxDepthInter | 2 | QuadtreeTUMaxDepthIntra | 2 |
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