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Journal of Electrical and Computer Engineering
Volume 2014 (2014), Article ID 198120, 8 pages
Performance Driven Six-Port Receiver and Its Advantages over Low-IF Receiver Architecture
The Intelligent RF Radio Technology Laboratory (iRadio Lab), Department of Electrical and Computer Engineering, Schulich School of Engineering, University of Calgary, Calgary, AB, Canada T2N 1N4
Received 5 October 2013; Revised 22 November 2013; Accepted 30 December 2013; Published 23 February 2014
Academic Editor: Adriana Serban
Copyright © 2014 Abul Hasan and Mohamed Helaoui. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
This paper provides an extensive analysis of the performance of a six-port based direct conversion receiver (SPR) in terms of signal quality, dynamic range, noise figure, ports matching, isolation, bandwidth, and cost. Calibration technique using multimemory polynomials has been adopted in order to improve the signal quality of the six-port receiver. The performances of the calibrated receiver are then compared with the performances of a commercially available I-Q demodulator used as a low-IF receiver. The main advantages and disadvantages of the SPR compared to the low-IF receiver are highlighted. The major advantages of the SPR come in terms of its available input frequency bandwidth and the low power requirement. The SPR system requires no external bias supply but suffers in terms of the available conversion gain. A better port matching of the SPR can be guaranteed over a wide frequency bandwidth, which mixer based receiver systems lack. The main component limiting the performance of a SPR is the diode detector. A faster and a better diode detector will alleviate some of the problems highlighted in this paper. The SPR system is calibratable and its error-vector-magnitude performance can be made better than the I-Q demodulator used as a low-IF receiver.
The Six-Port technique was first introduced in the 1970s for accurate power measurement and reflectometer applications [1, 2]. This technique for receiver applications, first introduced as a digital direct conversion receiver in 1994 , has caught considerable attention from the RF and microwave research community. Six-Port based receiver (SPR) architecture has been identified as a promising architecture for implementing the software defined radio (SDR) receiver concept [4, 5]. It offers various advantages over conventional receiver architectures as it avoids the use of costly and active nonlinear mixer based circuits to achieve frequency down-conversion. Wide frequency bandwidth coverage, low power consumption, configurability, linearity, passive circuit implementation, low cost, and higher integration are some of the features that make this architecture very attractive for implementation of the SDR concept. The six-port concept, as a radio frequency (RF) front-end in communication receivers, is usually implemented using power dividers and quadrature hybrid circuits [6, 7]. Figure 1 shows the most common implementation of the six-port technique as an RF front-end in receiver architectures. This architecture uses three quadrature hybrids () and one power divider () connected in such a fashion that appreciable amount of signal powers from both the RF and the local oscillator (LO) ports reaches the four power detectors with premeditated attenuations and phase shifts. The concepts and reasoning behind various configurations for implementing this six-port junction circuit or wave-correlator is beyond the scope of the present paper.
The receiver front-end shown in Figure 1 is designed using passive microwave or discrete components. Though these passive circuit elements can be designed to cover a very wide frequency spectrum, their performances are guaranteed best at the design (or center) frequency. Also, the power detectors used in this architecture are usually implemented using diodes, which have limited linear dynamic range. Any deviation in the six-port wave-correlator circuit ( and ) performance or the diode power detectors () behaviors results in degraded receiver performance reflected in the error vector magnitude (EVM) between the transmitted constellation points and the received constellation points. In order to account for the circuit and system imperfections, various calibration techniques [8, 9] have been proposed for the SPR systems. The most common approach for the SPR systems is the linear modeling and calibration approach. In this linear modeling and calibration approach for the SPR systems, the in-phase () and the quadrature () components of the received RF signal () are written as linear combinations of the four detectors powers, the details of which are being provided in Section 2 of this paper.
In this paper the performance of SPR system has been thoroughly analyzed. A calibration algorithm using multiple memory polynomials has been used in order to improve the linearity performance of the six-port receiver. This linearity performance along with other criteria is compared to the performance of a commercially available - demodulator, and the advantages and the drawbacks of the SPR system are highlighted. ADL5382  from Analog Devices, Inc. has been chosen for this purpose. This demodulator is a broadband quadrature - demodulator and it covers an RF input frequency range from 700 MHz to 2.7 GHz. The evaluation board  for this - demodulator has a dc-block at the baseband outputs - and -ports. To avoid any distortion in the received signal due to this narrowband frequency filtering near zero frequency (dc), the present evaluation board has been used as a low-IF (intermediate frequency) receiver. The block diagram to implement the low-IF receiver concept using an - demodulator is shown in Figure 2. The further details of this implementation are being provided in Sections 3 and 4.
The remainder of this paper is organized as follows. Section 2 formulates the linear calibration problem and the used algorithm to boost the linearity of six-port-based receiver systems, Section 3 provides the technical details of the implemented low-IF receiver using - demodulator, Section 4 details the measurement setup used for evaluating the performances of the implemented and calibrated six-port based receiver and the commercial low-IF receiver, Section 5 provides the results and comparisons, and Section 6 concludes the paper and provides some final comments and observations.
2. Linear Calibration of Six-Port Receiver
Modern communication systems use complex representation for the baseband signals. A real-world message is digitized and coded in terms of a bit sequence which is further modulated digitally and mapped to a stream of message symbols with the help of two orthogonal signals, namely, the in-phase component signal and the quadrature component signal. If and represent the in-phase and the quadrature components, respectively, of a digitally modulated baseband signal, then the complex baseband signal is written as in The complex baseband signal is frequency upconverted to a desired carrier frequency in the transmitter using a complex mixer. The bandpass representation of the communication signal transmitted by the transmitter is denoted by :
The fundamental task of a communication receiver is to faithfully recover the complex baseband signal , that will in turn provide the originally transmitted information bits . The following subsections describe the approach through which a six-port based receiver recovers the complex baseband signal in an efficient and accurate way.
2.1. Six-Port Junction Calibration
Let be the phasor representation of the original transmitted signal reached at the receiver antenna and let be the phasor representation of local oscillator (LO) signal; then the power detected by the power detector can be written as in where , , are the -parameters of the six-port junction or wave-correlator circuit. Equation (3) can be expanded and rewritten in a matrix form as in where Matrix in (4) is dependent only on the -parameters of the six-port junction and the LO signal. From (4), and can be written as a linear combination of , , , and by inverting as in Here, and are the entries in the third and the fourth row of matrix, respectively. We call this approach of modeling and calibrating a six-port receiver as linear modeling and calibration. These eight constants ( and ; ) are called calibration constants and they must be obtained through a suitable calibration means for successful recovery of the - and -components of the received signal. These parameters are independent of the RF signal and are functions of the -parameters of the six-port junction and the LO signal.
2.2. Power Detector Linearization
It is obvious from (6) and (7) that this equation uses four powers readings () from the four power detectors. The outputs from the power detectors are voltages which shall be proportional to their corresponding input powers, if the detectors are operating in their ideal linear regions. In the linear regions of the diode power detectors, the relationship between the input powers and the output voltages can be written as in where is a parameter dependent on the characteristic of the power detector.
Diode-based power detectors are widely used nowadays because of their low power and simplified support circuitry requirement. The dynamic range of the diode power detectors, where the output voltage from the detector is proportional to the input microwave power, is quite limited. This limits the useful range of operations of the diode power detectors for many applications. For example, when the diode power detectors are used in a SPR system, the dynamic ranges of the diode power detectors limit the dynamic range of the whole receiver system. To extend this dynamic range, the power detectors can be operated beyond their linear regions, where they exhibit nonlinear characteristic. Linearization of the diode power detectors characteristics is performed to open up this limitation and to extend their dynamic range without affecting the received signal quality. The output voltage of the diode power detector is used to predict its characteristic and compensate for its nonlinear behavior. In nonlinear region of a diode power detector, the output detector voltage can be thought of as a nonlinear function of the detector input power as shown in where is a nonlinear function governed by the nonlinear characteristic of the power detector. In order to obtain the linear power corresponding to any output voltage, an inverse function must be applied to the detector output voltage (). There are different ways [9, 11, 12] to implement this inverse function and linearize the diode power detector characteristic, but we choose here a wideband linearization approach  that results in a single step linearization and calibration for the whole six-port based receiver system.
2.3. Wideband Linearization and Calibration
It has been reported in  that the diode detectors display memory effect, which is a frequency dependent phenomenon. When the inputs to the diode detectors are wideband modulated signals, the relationship between the instantaneous inputs power and the corresponding output voltage is quite different from the usual continuous wave (CW) characteristics modeled in (8). This phenomenon has been modeled more accurately in  using a modified memory polynomial:
The detector linearizer model in (10) is applied to (6) and (7) to obtain a wideband single step in situ linearization and calibration model for the whole six-port based receiver system. This wideband model  to linearize and calibrate the SPR system and to obtain the - and -components of the received signal is written as in Here, and are the wideband calibration parameters that must be estimated using a suitable calibration means. Once these parameters are calibrated for the SPR system, the - and -components of the received signal can be recovered from the four detectors voltages using (11) and (12).
3. Low-IF Receiver Using - Demodulator
The commercially available - demodulator used for comparison in this paper is an evaluation board (EVB) of ADL5382  from Analog Devices, Inc. This demodulator covers an RF input frequency range from 700 MHz to 2.7 GHz and requires a 5 V supply to generate internal biases . The reason for using this EVB as a low-IF receiver instead of direct conversion receiver (DCR or zero-IF receiver) has been explained in Section 1. To reinforce the point, Figure 3 shows the spectrum plots for a transmitted and received 16-QAM modulated signal when - demodulator is used as a DCR. The removal of frequency components around zero frequency from the received signal by the EVB results in distortions and the increased EVM between the transmitted and the received constellation points.
The - demodulator for the low-IF receiver is operated in single ended mode as is the case with the six-port-based receiver system discussed in Section 2. To operate the - demodulator as a low-IF receiver, the LO frequency () supplied to the demodulator has been offset by an intermediate frequency () from the carrier frequency () of the RF signal sent by the transmitter. The - demodulator output in this case can be written as in Here, is the initial phase difference between the transmitter LO signal () and the receiver LO signal (. The real signal is the signal which is captured and processed in the digital signal processing block shown in Figure 2. The digitized signal is digitally demodulated from intermediate frequency to the baseband and corrected for the phase error . The demodulated signal approximates the original transmitted baseband signal .
In order to assess the performance of both receivers, a performance metric in terms of error vector magnitude (EVM) between the transmitted and the received signal is used. The EVM between the transmitted signal () and the received signal () of symbol lengths is defined as in
4. Implementation and Measurement Setup
The baseband signals for the test setups are generated in MATLAB and sent to the MXG vector signal generators (N5182A from Agilent Technologies, Inc.) for signal modulation and frequency upconversion to a desired carrier frequency (). The output of this signal generator is connected to the RF ports of the receivers to simulate an actual RF received signal. The LO signal for the receivers is supplied by a PSG CW signal generator (E8247C from Agilent Technologies, Inc.) and the desired receiver LO frequency is set here. Off-the-shelf 3 dB quadrature hybrids and power divider are used to configure the six-port junction structure for the SPR system. Four zero bias Schottky diode detectors (8472B from Agilent Technologies, Inc.) are used as port power detectors as shown in Figure 4. The EVB for ADL5382 is used as - demodulator for the low-IF receiver as shown in Figure 5. DC power supply (E3631A from Agilent Technologies, Inc.) provides the bias voltage required for ADL5382EVB. The four detectors output voltages (in case of SPR) or the demodulator - and -signals (in case of low-IF receiver) are captured using synchronized four-channel mixed signal scope (MSO9404A from Agilent Technologies, Inc.) with the VSA software. The captured voltages, in case of SPR, are used to calibrate the receiver system and estimate the received symbols using (11) and (12) as explained in Section 2. The captured voltages, in case of low-IF receiver, are used to bring down the low-IF signal to baseband using an appropriate demodulation process explained in Section 3. All the calibration, estimation, and demodulation are carried out in MATLAB on a desktop computer.
5. Results and Observations
The 16-QAM and the 64-QAM signals with different frequency bandwidths are sent at a carrier frequency of 2.0 GHz to both the SPR and the low-IF receivers. The baseband symbols are upsampled by a factor of 8 and passed through a raised cosine filter of roll-off factor 0.3 and a delay of 3 taps. The mean power of the RF signal is set to be −3 dBm. The LO signal is supplied at the carrier frequency, in case of SPR, and at a frequency offset by from the carrier frequency, in case of low-IF receiver. The LO power is set to be 0 dBm. The RF and the LO powers are kept constants for both setups throughout the experiment. The low-IF receiver bias circuitry draws a current of 0.268 A at constant 5.0 V from the DC power supply. Table 1 summarizes the LO frequencies used for different signals in the low-IF receiver.
The baseband signal sampling frequency for a specific signal type is kept the same for both receiver architectures for fair comparison.
5.1. Architectural Comparison
Table 2 summarizes the main architectural differences between the SPR system and the low-IF receiver used for study in this paper. The demodulation bandwidth in case of SPR system is lower as compared to low-IF receiver because the diode detectors used here are limited in their speeds.
5.2. EVM Performance Comparison
With the settings in Table 1 and the transmitted signal carrier frequency at 2.0 GHz, the - and -data for low-IF receiver are obtained through the process explained in Section 3. Similarly, the - and -data for the SPR are obtained according to the method explained in Section 2 after boosting the linearity of the SPR receiver using the calibration technique shown in (11) and (12).
Table 3 summarizes the EVM performances of both receivers under identical signal conditions. For the sake of completeness, the EVMs of the received signals for the - demodulator used as DCR are also listed in Table 3. Conventional SPR performance is based on polynomial detector linearizer  which corresponds to the linear and memoryless calibration model of . The in situ linearization and calibration model improves the overall performance of the SPR system. Figures 6 and 7 show the transmitted and the received constellation points of a 64-QAM signal having 2 MHz bandwidth for the low-IF receiver and the SPR system, respectively. Similarly, Figures 8 and 9 show the transmitted and the received signals frequency spectrums of a 64-QAM modulated signal having 2 MHz bandwidth for the low-IF receiver and the SPR system, respectively. The EVM performance of the SPR system is better in comparison to the low-IF receiver. The high EVM for low-IF receiver comes mainly from image frequency and IMDs (intermodulation distortions). We have not compensated for these impairments in the low-IF receiver, while the SPR system is calibrated for any nonlinearities and memories present. The spectrum for the low-IF receiver shown in Figure 8 is filtered to remove the image and IMDs coming from the IF-receiver.
5.3. Power Requirements Comparison
Table 4 compares the powers of the RF signal and LO signal and the total power requirement for both receiver systems. The SPR requires four ADCs for sampling the baseband signals, while the low-IF receiver requires only two. A 12-bit ADC (AD9626 from Analog Devices, Inc.)  has been chosen for the power consumption comparison provided in Table 4.
The SPR system has an advantage here as it does not require any external bias power supply. This drastically reduces the power consumption of the whole receiver system. For the example case considered here, the total power requirement of the SPR system (1.0015 W/30.01 dBm) is about half (~54%) of the total power requirement of the low-IF receiver (1.8415 W/32.65 dBm). It is true, from the datasheet  of the EVB, that the low-IF receiver can be operated at much lower power levels of the RF and the LO signals, still the bias power requirement dominates the total power requirement of the low-IF receiver.
The abovementioned levels of the RF and the LO powers have been chosen such that the signal levels at the input of the diode detectors are above their sensitivity levels and the detectors generate detectable voltages at their output terminals.
5.4. Ports Matching Comparison
The RF and the LO ports matching and the isolation between them are important parameters for characterizing a receiver system. Table 5 summarizes these characteristics for both receivers under study. Because of passive quadrature hybrids and power dividers involvement better port matching over a wide frequency bandwidth can be achieved in case of SPR system, while low-IF receiver offers better isolation between the RF and the LO ports. The isolation between the RF and the LO ports that results in dc-offset in the output is an important parameter for direct conversion receivers. The performance loss due to this imperfection can be accurately modeled and calibrated for in the SPR systems.
5.5. Conversion Gain Comparison
The outputs of the low-IF receiver EVB are the single ended - and -signals while those of the SPR system are four voltages generated by the four power detectors. The peak value of the /-signals in case of low-IF is about 250 mV, while the peak value of the detectors output voltages is about 22 mV. The RF and the LO powers for the two test cases are identical. Considering the connectors and cable losses for both the test setups identical, the low-IF receiver has at least 18 dB higher conversion gain as compared to the six-port based receiver. The higher conversion gain of the low-IF receiver comes from the active mixers used in the demodulator circuitry.
5.6. Noise Figure, Sensitivity, and Dynamic Range
The noise figure of the SPR RF front-end circuit is defined here in terms of the loss of the wave-correlator circuit and the noise figure of the diode detector using Friis equation: Here, is the loss of the wave-correlator circuit. This loss factor is about 7 dB for passive wave-correlator consisting of quadrature hybrids and power divider. The noise factor of the diode detector is defined as in where , and , are the detector input and output signal and noise powers, respectively. Typical noise for single-tone continuous wave (CW) input for the used diode detector is less than 50 μV peak-to-peak . The detector outputs are more than 300 mV for an input CW signal of power 20 dBm. Assuming the input noise to the diode detector to be at the thermal level, the resulting noise figure of the six-port receiver is much higher as compared to the low-IF receiver noise figure of about 16 dB .
At about 2 GHz frequency, the minimum RF input level for acceptable EVM for the low-IF receiver is close to −40 dBm . The minimum RF level for the SPR is limited by the minimum detectable level of the diode detectors used. Given the noise level at the output of the detectors (50 μV peak-to-peak), the minimum RF signal level that can be accepted by the SPR system is about −10 dBm .
The maximum power handling capability of the used diode detector is about 20 dBm. This decides the dynamic range of the diode detectors and hence the dynamic range of the whole receiver system. Though the linear region of the diode detector used is quite limited, its dynamic range can be improved to about 30 dB using the linearization and calibration method used in . The dynamic range of the low-IF receiver evaluated here is more than 50 dB . Table 6 summarizes the results of the analysis carried out.
In this paper the performance of a six-port based receiver (SPR) system has been analyzed. Multimemory polynomial calibration technique has been applied to the detected voltage readings from the four power detectors in order to boost the linearity of the receiver. This linearity performance and other performance metrics such as dynamic range, power consumption, port matching, and isolation are compared to the performance of a commercially available - demodulator. The calibrated six-port based receiver offers a wide available RF bandwidth and better port matching as compared to the - demodulator but suffers heavily in terms of noise figure, sensitivity, and dynamic range. The major limitations of the SPR come from the diode power detectors. Better power detectors will alleviate some of the issues highlighted here. The error-vector-magnitude (EVM) performance of the SPR system can be improved by linearizing the diode detectors and calibrating the whole system in situ. The other advantage of the SPR system comes in terms of its power requirement. SPR system requires no external bias supply and the LO power requirement is comparable to the RF power level. The external supply helps improve the conversion gain of the - demodulator. The 3 dB demodulation bandwidth of the - demodulator is almost a decade higher than the SPR system. The demodulation bandwidth of the SPR system can be improved by using faster diode detectors in the system.
Conflict of Interests
The authors declare that there is no conflict of interests regarding the publication of this paper.
This work was supported by the Alberta Innovates, Technology Futures (AITF), the Natural Sciences and Engineering Research Council of Canada (NSERC), and the Canada Research Chair (CRC) Program.
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