Steady-State Response of Periodically Switched Linear Circuits via Augmented Time-Invariant Nodal Analysis

Table 1

CPU-time required by the simulation of the circuit of Figure 3 and accuracy of the computed current and voltage responses and , for an increasing number of terms defining their truncated expansions (e.g., see (23)).

Method	ODE  ns; μs	Extended MNA
		CPU-time	18.7 s	0.052 s	0.059 s	0.079 s	0.15 s	0.17 s	0.23 s	0.46 s
Relative error	Reference	4.7%	1.3%	0.4%	0.13%	0.09%	0.06%	0.04%
Relative error	Reference	15%	9.5%	5.9%	3.4%	2.7%	2.42%	1.98%