A Low Leakage Autonomous Data Retention Flip-Flop with Power Gating Technique

Table 4

Delay of different flip-flops.

Flip-flops	clk-to- (ps)		Setup time (ps)		Delay (ps)
	Tc-q(l-h)	Tc-q(h-l)	Tsu(l-h)	Tsu(h-l)
ST-TG-FF	52.74	49.61	6.14	12.08	61.69
Mutoh-FF	117.32	68.60	13.36	26.39	130.68
Balloon-FF	69.15	61.66	6.48	11.59	75.63
Memory-TG-FF	76.78	70.66	6.25	14.19	84.85
ADR-FF	87.41	82.86	9.13	13.87	96.73