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Journal of Electrical and Computer Engineering
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Journal of Electrical and Computer Engineering
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2015
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Article
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Fig 10
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Research Article
Applying Partial Power-Gating to Direction-Sliced Network-on-Chip
Figure 10
The relationship between latency, power-consumption, and compensated sleep cycles.
(a)
Average latency
(b)
Total power
(c)
Compensated sleep cycles