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Hardware Implementation of Digital Signal Processing Algorithms
Call for Papers
As the technology advances, more complicated systems emerge, requiring sophisticated algorithms often encompassing very complex digital signal processing (DSP) techniques. Although the performance of programmable processors is continuously improving, hardware implementation of DSP algorithms is increasingly required in several areas such as wireless communications, multimedia systems, computer networks, and biomedicine. There are several challenges that engineers face while designing hardware DSP algorithms. These challenges are heightened by the needs of huge computing power (required in real-time systems), reducing energy consumption (for portable, battery-operated systems) and reducing costs. Technology scaling adds additional difficulties related to variability of device parameters, leakage currents, and signal integrity. Therefore, hardware implementation of DSP algorithms has gained much attention during past years and is the focus of this special issue. Original manuscripts are welcomed in this special issue. Potential topics include, but are not limited to:
- FPGA and ASIC implementations of DSP algorithms
- VLSI building blocks for hardware implementation of DSP algorithms
- Low-power hardware realization of DSP algorithms
- DSP hardware for sensor systems
- Implementation of DSP algorithm in System-on-Chip (SoC)
- High-level synthesis for hardware implementation of DSP algorithms
- Hardware implementation of DSP algorithms for wireless communications
- Hardware implementation of DSP algorithms for biomedical signal processing
- Hardware implementation of DSP algorithms for image, video, and multimedia processing
- Hardware implementation of DSP algorithms for machine learning
- Hardware implementation of DSP algorithms for audio speech and language processing
Before submission authors should carefully read over the journal's Author Guidelines, which are located at http://www.hindawi.com/journals/jece/guidelines/. Prospective authors should submit an electronic copy of their complete manuscript through the journal Manuscript Tracking System at http://mts.hindawi.com/ according to the following timetable:
| Manuscript Due | Friday, 7 December 2012 |
| First Round of Reviews | Friday, 1 March 2013 |
| Publication Date | Friday, 26 April 2013 |
Lead Guest Editor
- Ashkan Ashrafi, Department of Electrical and Computer Engineering, San Diego State University, 5500 Campanile Drive, San Diego, CA 92182-1309, USA
Guest Editors
- Antonio G. M. Strollo, Department of Biomedical, Electronic and Telecommunication Engineering, University of Naples Federico II, Via Claudio 21, 80125 Naples, Italy
- Oscar Gustafsson, Division of Electronics Systems, Department of Electrical Engineering, Linköping University, 581 83 Linköping, Sweden