627215.fig.0017a
(a)
627215.fig.0017b
(b)
Figure 17: View of well-aligned SWCNT-TFT. (a) Schematic of the device. Aligned SWCNTs were synthesized on the quartz substrate at 900°C. Source, drain, and gate electrodes were deposited ITO at room temperature with HfO2 gate dielectric. (b) SEM image of aligned SWCNT arrays [67].