Research Article
Molecular Logic Computation with Debugging Method
Figure 3
The simulation result of the full adder.
| (a) Input 000 |
| (b) Input 001 |
| (c) Input 010 |
| (d) Input 011 |
| (e) Input 100 |
| (f) Input 101 |
| (g) Input 110 |
| (h) Input 111 |
| (a) Input 000 |
| (b) Input 001 |
| (c) Input 010 |
| (d) Input 011 |
| (e) Input 100 |
| (f) Input 101 |
| (g) Input 110 |
| (h) Input 111 |