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International Journal of Quality, Statistics, and Reliability

Volume 2011 (2011), Article ID 396297, 8 pages

http://dx.doi.org/10.1155/2011/396297

## Quality Assessment of Transient Response Analysis Method for Detecting Radiation-Induced Faults

^{1}Mechatronics Research Group, Universidad Tecnológica Nacional, Avenida Universidad 450, 5900 Villa María, Argentina^{2}Electronics and Instrumentation Development Group, Universidad Nacional de Córdoba, Medina Allende S/N, 5000 Córdoba, Argentina

Received 17 January 2011; Revised 12 June 2011; Accepted 23 June 2011

Academic Editor: Suk joo Bae

Copyright © 2011 José Peralta et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

#### Abstract

We evaluate the ability of transient response analysis method (TRAM), a simple test strategy proposed for filters, to detect deviations in circuit specifications beyond established limits. Particularly, we focus our attention on deviations produced by displacement damage in integrated resistors. This damage is produced by the impact of high-energy particles like the encountered in space environments. For this purpose, we formulate a simple deviation-fault model that takes into consideration the degradation addressed. Additionally, more transient response parameters are taken into account in order to improve the fault coverage. We adopt for our evaluations two typical second-order filters as cases of study. For these filters, the simulation results show that TRAM reaches excellent fault coverage for both filters, suggesting that its use in space applications is encouraging.

#### 1. Introduction

In space applications, the systems operate in a harsh environment without easy access for maintenance. For this reason, it is desirable to employ circuits with self-testing functionalities that can be part of a self-repair or fault tolerance strategies. The self-test determines if a given system/subsystem suffered degradation in its functional parameters that can compromise the safe operation of the whole application. For analog circuits, a common approach for test is checking the functional specifications of the circuit under test. In this sense, a circuit is accepted as fault-free if all specifications are complied. However, functional test imposes strict demands on test circuitry and test time that has motivated the proposal of alternative strategies [1, 2].

Transient response analysis method (TRAM) is a simple test strategy proposed for filters implemented as a cascade of second-order sections [3, 4]. The conceptual simplicity of TRAM and the relatively simple measurements required make this test scheme appealing for a wide range of applications. In this method, the filter is partitioned into second-order sections. Each section is excited with a step, ramp or parabola input signal. It is assumed that a faulty filter is detected by observing changes in one or more parameters of the section transient response.

The evaluation of TRAM ability for detecting faults in production environments using parametric fault models is presented in [5, 6]. In order to explore the performance of TRAM in space applications it is necessary to employ different fault models. This fault model should represent a specific damage but keep reasonable the computational cost of fault simulations. Due to this fact, it becomes necessary to relate the fault model with the degradations usually observed in space.

One of the major concerns in space applications is the susceptibility of electronic components to ionizing radiation. Several effects, like total ionization dose (TID), single-event transient, analog single-event transient, and single event gate rupture, are observed and characterized [7, 8]. TID effects are very significant due to the progressive deviation they produce in the circuital parameters that can cause the performance degradation of the whole application [9–11].

By other way, the so-called displacement damage (DD) occurs in semiconductors due to the impact of particles with high enough energy to create defects in the crystalline lattice of silicon. These defects may migrate and disappear by recombination with other defects in the substrate. However, a few of them can agglomerate to form small but more stable defects. DD affects important material parameters like the free carriers mobility and density and their associated generation and recombination processes. This has significant impact on the electrical properties of the irradiated material [12], increasing the values of the diffused resistances. In extreme cases, under radiation of high flow of protons, the resistivity of the material increases drastically producing high-resistance layers [13, 14]. DD has been widely studied for military applications that must tolerate high neutron fluence but it was almost neglected for space applications up to recent past years. Due to new orbits increasingly located in the so-called trapped proton belt, the space industry has now to take into account the proton-induced displacement damage in the radiation analysis [15]. Consequently, the test schemes to be used in space applications should be evaluated for determining their ability for detecting faults induced by this mechanism.

In this work, we present an exploratory study on the ability of TRAM for detecting deviations in the circuit specifications beyond established limits. Two second-order filters are adopted as cases of study for performing our evaluations. The deviations are considered to be caused by DD in the resistances of the circuit producing a raise in the values of these components. The adoption of a deviation-fault model related to the physics of the degradation and the proposal of taking into account more parameters of the transient response than those evaluated in previous work [3, 4, 6] are the main contributions of this paper.

#### 2. Transient Response Analysis Method

For the sake of clarity, this section presents some basic concepts related to TRAM. Further details can be found elsewhere [9, 10].

As explained in Section 1, TRAM is a test methodology for second-order filters. It can be extended to higher order filters designed by cascading second-order sections. In TRAM, the second-order filter is excited with an input signal that causes a transient underdamped response. In test mode, the filter is disconnected from its normal input and output, and it is divided into its second order blocks using analog switches. Each block is connected to an input signal. According to the block characteristic, the stimulus could be step, ramp, or parabola, and it is generated with on-chip resources.

Figure 1 shows the test configuration for one section. During the test mode, switches SW1 and SW2 isolate the CUT, while SW3 and SW4 connect the input stimulus and the response evaluation module. SW1 and SW2 remain closed in normal mode, while SW3 and SW4 are open.

It is assumed that a fault in the filter will produce a change in the time occurrence of the peak () or in the overshoot (OS) of the output transient response. In this work, we consider additional parameters of the transient response with the goal of increasing the fault detection. These are the delay time (), rise time (), and settling time (). Figure 2 shows all the parameters considered in this paper. They are referred in this work as test parameters (TPs).

The measurement of TPs could also be done on chip, and different schemes could be used for this task, for instance, the response evaluation module proposed in [10], which uses very simple digital modules. It should be noted that the complexity of the built-in self-test (BIST) grows with the number of test parameters to be measured during the test phase. Consequently, the number of test parameters to be considered is a result of a tradeoff between quality of test and test complexity.

The values of the test attributes can be obtained by evaluating the expressions (1), where is the natural undamped frequency and is the damping factor. They characterize the dynamics of a second order filter [16] and are referred in this work as test parameters (TPs).

Functional specifications of second-order filters to be considered in this work, pole frequency (), and pole quality factor () are related to , and as follows:

#### 3. Filters under Test

The first case study is a benchmark band-pass filter [17], and the second case is a low-pass filter [18]. From here on, these circuits are appointed as Filter 1 (Figure 3) and Filter 2 (Figure 4).

From a simple analysis of the filters topologies, it is possible to obtain expressions (3) to (6). These expressions relate the specifications with the values of the components of Filter 1 and Filter 2, respectively. Expressions (7) and (8) relate to the components of the filters under test and are necessary for the evaluation of TPs expressions (1). In (7) and (8), and represent the damping factors for Filter 1 and Filter 2, respectively. Equations (1) to (8) are required for the fault injection procedure to be explained in the next section

It should be mentioned that these filters have been selected as cases of study to perform our exploratory study on the ability of TRAM to detect the addressed faults. As it is widely accepted in the test community, it is impossible to formulate a general test strategy valid for all analog circuits [1]. The efficiency of a given test strategy may be excellent for some circuits but very poor for other circuits. Consequently, the test strategies have to be carefully evaluated by means of extensive fault simulations campaigns on a case-by-case basis.

#### 4. Evaluation of Tram Quality

##### 4.1. Fault Injection Procedure

A fault injection procedure is required to determine the TRAM ability for detecting deviations in the functional specifications beyond their tolerances. For doing this task, the fault injection has to generate a sample of faulty circuits presenting different departures from its specifications. One alternative for generating this sample is to arbitrarily deviate the filter specifications [19], but this option ignores the correlation among them, not making it very realistic. A second alternative is the injection of deviations in the components (low-level parameters) of the system under test, for example, deviations in capacitors and resistances to obtain deviations in the functional specifications. Several authors propose the use of this approach, employing different fault models and procedures [20–23]. Nevertheless, the deviation patterns of the components are not related with the physical process of degradation. For instance, a resistance may adopt larger or smaller values outside its tolerance limits. This behavior may occur in a production environment, but may not be realistic for in-field test applications where the devices are subject to physical phenomena with known consequences.

We propose a fault injection procedure addressing a specific degradation. Particularly, we consider that the resistances of the CUT are affected by DD. As it was mentioned, this damage raises the values of the integrated resistors.

In order to model this effect, we deviate the mean value of the resistances distribution while preserving the standard deviation. The use of the model is illustrated in Figure 5, for the case of the resistor R1.

For selecting the deviations in the mean values to be used in the fault injection process, it is necessary to relate them with the proton fluencies that can be observed in typical orbits.

There are different models for predicting the proton flux given the orbit of the spacecraft. Nowadays, the model usually employed is the so-called AP-8 [24, 25]. From the data reported in these documents, it is determined the proton flux as a function of both altitude and energy. As an example, let us consider only 10 MeV protons. For this energy, it is observed a peak of 1.0 + 5 protons/cm^{2}·s, at an approximate altitude of two earth radii. By other way, from the experimental results reported in [26], it is possible to determine that the DD produced by 10 MeV protons causes deviations close to 40% of the nominal value of the silicon resistivity for a fluence near to 1.5 + 13 protons/cm^{2}. According to the above-mentioned model, this 10 MeV proton fluence can be reached in 5 years. However, it should be mentioned that a given device in orbit is subject to protons of a wide range of energies. Particularly important are lower-energy protons that cause higher damage. Consequently, the combined effects of the flux of protons of different energy enhance the damage, causing that deviations can even occur in less time.

On the other hand, previously reported results [8] show that capacitors present low sensibility to radiation effects. This assumption is based on evaluations done on metal-metal or poly-poly capacitors. For this reason, in the fault injection scheme they are considered as fault-free and show a normal statistical distribution defined by the production process. On the other side, operational amplifiers also show radiation effects. However, it is assumed that feedback will make these effects negligible.

By using the previously presented equations, it is possible to obtain the data for characterizing the test. Another possibility is to measure the parameter values from SPICE simulations, but this alternative presents a considerable higher computational cost than the direct evaluation of the expressions (1).

##### 4.2. Specification Limits

Functional specifications limits are set for and for the filters adopted as cases of study. The nominal values of these parameters are calculated with (3) to (6) using the resistances and the capacitors values shown in Figures 3 and 4. The lower specification limit (LSL) and the upper specification limit (USL) are established at ±10% of the specification nominal values (Table 1). Here, the specification limits are arbitrarily established for demonstrative purposes and can be changed according to the application needs.

##### 4.3. Limits for the Test Parameters

The limits of the TPs to be considered during the test have to be established, because they are used to declare a circuit as faulty if at least one of these limits is exceeded. For this purpose, it is necessary to characterize the behavior of the circuit under fault-free conditions.

In the plane -, (the so-called space of specifications) the domain limited by LSL and USL (from Table 1) defines an acceptance region *As*. A circuit is considered as fault-free if all its specifications are satisfied, that is, the values of and are inside *As*. By mapping *As* into the space of TPs, a new acceptance region in this space is obtained. For this mapping, we use expressions (1) to (2). In the operative phase of the test, a circuit is declared as fault-free if all TPs are within the acceptance region.

In order to show in a graphical way how the acceptance region in the TPs space is obtained, we consider the simplest case of only one TP. For this parameter and using the corresponding expression (equations (1) to (2)), it is possible to obtain the plot depicted in Figure 6. In this figure, the limits of the acceptance region in the TPs space are defined by the maximum and minimum of the surface. As can be seen from this example, the analysis of the behaviour of the TPs inside the domain defined by the acceptance region *As* can be easily performed in a graphical way. In this sense, cumbersome analytical handling of expressions (1) to (2) is avoided by using this graphical aid. For this reason we plot each TP (for the filters under test) in order to determine the TPs limits.

Figures 7–11 display the TPs plots for Filter 1. Filter 2 shows a similar behavior and for this reason, its related plots are not shown in this paper.

The lower and upper limits for each TP are named in the following as lower tolerance limit (LTL) and the upper tolerance limit (UTL), respectively. These limits are reported in Table 2.

Based on the procedure used to define the limits of the TPs, all circuits that fulfill the functional specifications, will present a value inside the acceptance region in the TPs space. In other terms, and without considering the measurement noise, the probability that circuits comply with specifications and fail the test is null.

##### 4.4. Fault Simulation and Test Compaction

The evaluation of the TRAM quality and the selection of the test parameters to be considered for improving the fault coverage are carried out by means of fault simulation, using the deviation-fault model described in Section 4.1. For the fault injection, we implement several 10000-sample Monte Carlo simulations, where each element in the samples represents a possible built filter. For the samples, we obtain the functional and the test parameters. A component without degradation presents normal distribution with a mean equal to its nominal value and a standard deviation of 3% of the nominal value.

The fault injection allows obtaining different proportions of bad and good circuits in a sample, with an underlying degradation process related to the physics of displacement damage that was previously discussed. Several samples are generated by injecting deviations in the mean of the resistance distribution, from 10% to 30% of its nominal value, resulting in a multiple fault injection scheme. In all samples, a circuit that presents its functional specifications inside *As* is considered as good, otherwise it is considered as bad.

The expression for the fault coverage (FC), which represents the probability of rejecting circuits that do not meet functional specifications, is where NFT is the number of filters that fail the test, and NFS is the number of filters that do not comply with the functional specifications. As it was previously mentioned, the probability of false positives is zero, that is, there are no circuits fulfilling the specifications that fail the test.

The FC value is evaluated for different combinations of TPs. This metric is used to perform a test set compaction by selecting only the combinations of TPs that present better FC values.

##### 4.5. Fault Injection Results

The fault simulation results for Filter 1 are reported in Table 3, while the results for Filter 2 are reported in Table 4. Columns 2 to 6 in these tables are labeled with the deviation percentage in the mean value of the resistances used in the simulation process. The TPs used as test criterion are listed in the first column with the corresponding FC percentage value in each row. In each case, the “+” means that the set of TPs are assessed jointly and that the filter is considered bad if at least one of them is beyond tolerance limits. It is worth to clarify that all individual TPs of the set must be within its acceptance range to accept a circuit as fault-free.

###### 4.5.1. Filter 1

For this filter, the best results for FC are written in bold font in Table 3. This table shows that the use of and OS, the commonly test attributes in TRAM, does not show the best results. For small deviations (15%), FC values higher than 77% are reached when using two or more TPs in the test (, and ).

In order to reduce the test time, cost, and power consumption, the number of parameters to be considered should be traded-off with FC. The best case is obtained by monitoring only two parameters (). The FC is reasonably good for low deviation faults and becomes excellent for moderated deviations.

It must stand out that using as a unique parameter, the FCs are 2% lower than the previous case. Even for moderate deviations in the resistances, FC is excellent under this condition. Due to the small differences observed among the FC values, this could be the most interesting option since it combines high fault coverage with a relatively low hardware overhead.

###### 4.5.2. Filter 2

The simulation outcomes for this filter (reported in Table 4) show that the best results are obtained for the same combination of TPs used for Filter 1. However, the FC values are significantly lower for Filter 2, especially for low or moderate deviations. The best results are written in bold font in Table 4. In these cases, the FC values become excellent when the deviations in the low-level parameter are higher than 20%. Once again, deserves a special mention, since the FC values yielded by this test attribute are 2.5% lower in the worst cases, making it very attractive when circuital complexity has to be avoided.

#### 5. Conclusions

In this paper, we presented an evaluation of the ability of TRAM for detecting deviations in the specifications beyond preestablished limits. It was assumed that the deviations in the specifications were produced by DD in the diffused resistors of the filters under test. This kind of damage can be induced by radiation fields in space environments and produce an increase in the value of the resistors.

It was performed an extensive fault simulation campaign in order to characterize the test. The obtained results showed that, for the addressed cases of study, TRAM could reach outstanding FC values. The best FC values were obtained by monitoring T_{d} with other test parameters. However, they did not remarkably improve the FC obtained by monitoring only the T_{d} parameter only. Therefore, a very good test strategy with a reduced hardware overhead can be obtained by choosing this option. The results obtained are very encouraging, especially for applications in space environments.

#### References

- B. Vinnakota,
*Analog and Mixed Signal Test*, Prentice Hall, Upper Saddle River, NJ, USA, 1998. - M. L. Bushnell and V. D. Agrawal,
*Essentials of Electronic Testing for Digital, Memory and Mixed-Signal Circuits*, Kluwer Academic Publishers, New York, NJ, USA, 2000. - J. Calvano, V. Alves, and M. Lubaszeswski, “Fault detection methodology for second order filters using compact test vectors transient analysis,” in
*Proceedings of the 3rd International Workshop on Design of Mixed-Mode Integrated Circuits and Applications*, pp. 18–24, Puerto Vallarta , Mexico, Julay 1999. - J. V. Calvano, V. Castro Alves, and M. Lubaszewski, “Fault detection methodology and BIST method for 2nd order Butterworth, Chebyshev and Bessel filter approximations,” in
*Proceedings of the 18th IEEE VLSI Test Symposium (VTS '00)*, pp. 319–324, May 2000. View at Scopus - J. Peralta, G. Peretti, E. Romero, and C. Marqués, “Evaluation of circuit test strategies using statistical fault models: a case study,”
*Mecánica Computacional*, vol. 26, pp. 2007–2015, 2007 (Spanish). View at Google Scholar - J. Peralta, G. Peretti, E. Romero, and C. Marqués, “A new performance characterization of transient analysis method,”
*International Journal of Electrical and Information Engineering*, vol. 3, pp. 251–258, 2009. View at Google Scholar - A. Holmes-Siedle and L. Adams,
*Handbook of Radiation Effects*, Oxford University Press, New York, NY, USA, 2002. - R. Schrimpf and D. Fleetwood,
*Radiation Effects and Soft errors in Integrated Circuits and Electronic Devices*, World Scientific, 2004. - C. L. Axness, L. Riewe, R. A. Reber, and A. Y. Liang, “Radiation characteristics of SIPOS and polysilicon resistors,”
*IEEE Transactions on Nuclear Science*, vol. 38, no. 6, pp. 1365–1369, 1991. View at Publisher · View at Google Scholar · View at Scopus - T. R. Oldham and F. B. McLean, “Total ionizing dose effects in MOS oxides and devices,”
*IEEE Transactions on Nuclear Science*, vol. 50, no. 3, pp. 483–499, 2003. View at Publisher · View at Google Scholar · View at Scopus - H. J. Barnaby, “Total-ionizing-dose effects in modern CMOS technologies,”
*IEEE Transactions on Nuclear Science*, vol. 53, no. 6, pp. 3103–3121, 2006. View at Publisher · View at Google Scholar · View at Scopus - C. Claeys and E. Simoen,
*Radiation Effects in Advanced Semiconductor Materials and Devices*, Springer, 2002. - M. Buehle, “Design curves for predicting fast-neutron-induced resistivity changes in silicon,”
*Proceedings of IEEE*, vol. 56, no. 10, pp. 1741–1743, 1968. View at Google Scholar - G. C. Messenger, “A summary review of displacement damage from high energy radiation in silicon semiconductors and semiconductor devices,”
*IEEE Transactions on Nuclear Science*, vol. 39, no. 3, pp. 468–473, 1992. View at Publisher · View at Google Scholar · View at Scopus - R. D. Schrimpf, “Radiation Effects in Microelectronics,” in
*Radiation Effects on Embedded Systems*, R. Velazco, P. Fouillat, and R. Reis, Eds., pp. 11–29, Springer, 2007. View at Google Scholar - K. Ogata,
*Modern Control Engineering*, Prentice Hall, 4th edition, 2002. - B. Kaminska, K. Arabi, I. Bell et al., “Analog and mixed-signal benchmark circuits—first release,” in
*Proceedings of the International Test Conference*, pp. 183–190, Washington, DC , USA, November 1997. View at Scopus - J. Savir and Z. Guo, “Test limitations of parametric faults in analog circuits,”
*IEEE Transactions on Instrumentation and Measurement*, vol. 52, no. 5, pp. 1444–1454, 2003. View at Publisher · View at Google Scholar · View at Scopus - J. V. Calvano, A. C. Mesquita Filho, V. C. Alves, and M. S. Lubaszewski, “Fault models and test generation for OpAmp circuits-The FFM,”
*Journal of Electronic Testing*, vol. 17, no. 2, pp. 121–138, 2001. View at Publisher · View at Google Scholar · View at Scopus - S. Sunter and N. Nagi, “Test metrics for analog parametric faults,” in
*Proceedings of the 17th IEEE VLSI Test Symposium*, pp. 226–234, April 1999. View at Scopus - A. Chaehoi, Y. Bertrand, L. Latorre, and P. Nouet, “Improving the efficiency of the oscillation-based test methodology for parametric faults,” in
*Proceedings of the 4th IEEE Latin American Test Workshop*, pp. 234–237, 2003. - F. Liu and S. Ozev, “Statistical test development for analog circuits under high process variations,”
*IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems*, vol. 26, no. 8, pp. 1465–1477, 2007. View at Publisher · View at Google Scholar · View at Scopus - A. Bounceur, S. Mir, E. Simeu, and L. Rolíndez, “Estimation of test metrics for the optimisation of analogue circuit testing,”
*Journal of Electronic Testing*, vol. 23, no. 6, pp. 471–484, 2007. View at Publisher · View at Google Scholar · View at Scopus - J. L. Barth, C. S. Dyer, and E. G. Stassinopoulos, “Space, atmospheric, and terrestrial radiation environments,”
*IEEE Transactions on Nuclear Science*, vol. 50, no. 3, pp. 466–482, 2003. View at Publisher · View at Google Scholar · View at Scopus - D. M. Sawyer and J. I. Vette, “AP-8 trapped proton environment for solar maximum and solar minimum,” Tech. Rep. 76-06, NASA/Goddard Space Flight Center, Greenbelt, Md, USA, 1976, NSSDC/WDC-A-R&S. View at Google Scholar
- R. L. Pease, E. W. Enlow, G. L. Dinger, and P. Marshall, “Comparison of proton and neutron carrier removal rates,”
*IEEE Transactions on Nuclear Science*, vol. NS-34, no. 6, 1987. View at Google Scholar · View at Scopus