On the Discrete-Time Modeling of a DC-to-DC Power Converter and Control Design with Discrete-Time Sliding Modes

Figure 5

Comparison of discrete-time controllers with a sample time of 50 μs. Output capacitor voltage (continuous line), reference signal (dashed line). (a) Output capacitor voltage obtained with sampled controller. (c) Output capacitor voltage obtained with proposed controller. (b) and (d) are zoom views of same variables on the left.

(a)

(b)

(c)

(d)