Research Article

Supplementary High-Input Impedance Voltage-Mode Universal Biquadratic Filter Using DVCCs

Table 1

TSMC 0.35 μm CMOS process parameters.

NMOS

L E V E L = 3 T O X = 7 . 9 𝐸 9 N S U B = 1 𝐸 1 7 G A M M A = 0 . 5 8 2 7 8 7 1 P H I = 0 . 7 V T O = 0 . 5 4 4 5 5 4 9 D E L T A = 0 U O = 4 3 6 . 2 5 6 1 4 7 E T A = 0 T H E T A = 0 . 1 7 4 9 6 8 4
K P = 2 . 0 5 5 7 8 6 𝐸 4 V M A X = 8 . 3 0 9 4 4 4 𝐸 4 K A P P A = 0 . 2 5 7 4 0 8 1 R S H = 0 . 0 5 5 9 3 9 8 N F S = 1 𝐸 1 2 T P G = 1 X J = 3 𝐸 7 L D = 3 . 1 6 2 2 7 8 𝐸 1 1
W D = 7 . 0 4 6 7 2 𝐸 8 C G D O = 2 . 8 2 𝐸 1 0 C G S O = 2 . 8 2 𝐸 1 0 C G B O = 1 𝐸 1 0 C J = 1 𝐸 3 P B = 0 . 9 7 5 8 5 3 3 M J = 0 . 3 4 4 8 5 0 4 C J S W = 3 . 7 7 7 8 5 2 𝐸 1 0 M J S W = 0 . 3 5 0 8 7 2 1

PMOS

L E V E L = 3 T O X = 7 . 9 𝐸 9 N S U B = 1 𝐸 1 7 G A M M A = 0 . 4 0 8 3 8 9 4 P H I = 0 . 7 V T O = 0 . 7 1 4 0 6 7 4 D E L T A = 0 U O = 2 1 2 . 2 3 1 9 8 0 1 E T A = 9 . 9 9 9 7 6 2 𝐸 4
T H E T A = 0 . 2 0 2 0 7 7 4 K P = 6 . 7 3 3 7 5 5 𝐸 5 V M A X = 1 . 1 8 1 5 5 1 𝐸 5 K A P P A = 1 . 5 R S H = 3 0 . 0 7 1 2 4 5 8 N F S = 1 𝐸 1 2 T P G = 1 X J = 2 𝐸 7 L D = 5 . 0 0 0 0 0 1 𝐸 1 3
W D = 1 . 2 4 9 8 7 2 𝐸 7 C G D O = 3 . 0 9 𝐸 1 0 C G S O = 3 . 0 9 𝐸 1 0 C G B O = 1 𝐸 1 0 C J = 1 . 4 1 9 5 0 8 𝐸 3 P B = 0 . 8 1 5 2 7 5 3 M J = 0 . 5 C J S W = 4 . 8 1 3 5 0 4 𝐸 1 0 M J S W = 0 . 5