Research Article
Utilization Bound Scheduling Analysis for Nonpreemptive Uniprocessor Architecture Using UML-RT
Table 5
Success ratio and effective processor utilization for various loads analyzed.
| System load | Success ratio | Effective processor utilization |
| 0.9964 | 96.02 | 92.83 | 0.9919 | 98.5 | 96.66 | 0.9871 | 98.78 | 96.66 | 0.962 | 97.97 | 95.27 | 0.986 | 98.13 | 95.85 | 0.9827 | 98.35 | 95.5 | 0.9784 | 99.52 | 97.05 | 0.977 | 100 | 97.5 | 0.9749 | 100 | 96.72 | 0.9676 | 100 | 96.16 | 0.9605 | 100 | 95.83 | 0.9546 | 100 | 94 | 0.9202 | 100 | 91.16 |
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