Research Article

Comparative Analyses of Phase Noise in 28 nm CMOS LC Oscillator Circuit Topologies: Hartley, Colpitts, and Common-Source Cross-Coupled Differential Pair

Figure 1

Schematic of the oscillator circuit topologies: (a) single-ended Colpitts, (b) single-ended Hartley, and (c) top-biased common-source cross-coupled differential pair. , , and are DC bias voltages. In Colpitts and Hartley topologies, the output voltage is taken after a 100 nF capacitor in order to remove the DC component.
421321.fig.001a
(a)
421321.fig.001b
(b)
421321.fig.001c
(c)