Research Article

Effects of Gate Stack Structural and Process Defectivity on High- Dielectric Dependence of NBTI Reliability in 32 nm Technology Node PMOSFETs

Figure 5

Threshold voltage shift as a function of stress time at (a) different stress temperatures and (b) different stress gate voltages. Hole trap density, , and interface trap density, , as a function of stress time at (c) different stress temperatures and (d) different stress gate voltages.
490829.fig.005a
(a)
490829.fig.005b
(b)
490829.fig.005c
(c)
490829.fig.005d
(d)