Abstract
This paper presents a closed-form equation of data dependent jitter (DDJ) in first order low pass systems. The DDJ relates to the system bandwidth, the bit rate, the input rise/fall time, and the number of maximum consecutive identical bits of the data pattern. To confirm the derived equation, simulations have been done with a first order RC low pass circuit for various system bandwidths, bit rates, input rise/fall times, and data patterns. The simulation results agree well with the calculated DDJ values by the derived equation.
1. Introduction
As bit rate increases, timing jitter becomes more critical to system performances of a high speed serial interface. Timing jitter deteriorates signal quality at the transmitter side and degrades BER performance at the receiver side [1–4]. To guarantee the satisfactory system performances of a high speed serial interface, timing jitter should be accurately predicted and carefully considered when we design system architecture, link budget, and each circuit building block.
Timing jitter is composed of unbounded random jitter (RJ) and bounded deterministic jitter (DJ). The RJ is produced by Gaussian electrical noise within system components and the DJ is categorized into duty cycle distortion (DCD) jitter, data dependent jitter (DDJ), and bounded uncorrelated jitter (BUJ) [5, 6]. Among them, the DDJ is focused on in this paper. The DDJ has an impact on the high speed serial interface especially when the bit rate increases while the system bandwidth is restricted [7, 8]. As shown in Figure 1, the DDJ is generated when a certain data pattern with the bit rate, , passes through a system with the limited bandwidth, .
So far, some papers have been published to predict the DDJ in the general transmission lines [7–9] and in the first order low pass systems [10–14]. The DDJ in the transmission line may apply to the interconnect channels such as off-chip PCB traces, off-chip cables, and on-chip interconnect lines while the DDJ in the first order low pass system may apply to the transceiver circuit building blocks such as drivers, buffers, amplifiers, and limiters. For the transmission lines, the DDJ has been predicted by using the simulated transient step response and the worst-case input bit sequence to shorten the simulation time [7–9]. On the other hand, for the first order low pass systems, the DDJ has been predicted based on the infinite number of calculated pulse or step responses of all the previous bits while the rise/fall time of the input signal was assumed to be zero ideally. However, because it is not possible to calculate the infinite number of pulse or step responses of all the previous bits, only two or four preceding bits have been considered instead for the actual DDJ prediction [10–14]. So, the calculated DDJ always underestimates the real DDJ and the prediction accuracy may degrade as the bit rate increases relatively to the system bandwidth.
In this paper, a new closed-form equation of DDJ in the first order low pass system is presented. The DDJ is directly derived by solving the differential equation of the first order RC low pass circuit and by using the repetitiveness of the data pattern. Of course, this repetitiveness of the data pattern can be generalized for the real random data by increasing the pattern length to the infinity. The derived DDJ equation relates to the system bandwidth, the bit rate, the input rise/fall time, and the number of maximum consecutive identical bits of the data pattern. Contrary to the previous works, the calculated DDJ by the derived equation coincides exactly with the simulated DDJ. Additionally, the effect of nonzero input rise/fall time is also to be considered.
This paper is composed of five sections. In Section 2, the closed-form DDJ equation is derived by assuming zero input rise/fall time. Section 3 extends the derived DDJ equation to the data pattern with nonzero input rise/fall time. To confirm the derived DDJ equation, the simulation results are shown in Section 4 and conclusions are given in Section 5.
2. Calculation of DDJ with Zero Input Rise/Fall Time
2.1. Differential Equation of First Order RC Low Pass Circuit
Given a data pattern, a bit rate, and a system bandwidth, the DDJ can be derived by solving the differential equation of the first order RC low pass circuit shown in Figure 2. Depending on the bit transition patterns, such as 01, 00, 10, and 11, the input signal, , and the initial condition, , of the first order RC low pass circuit are given differently for each bit duration, , as shown in Figure 3. In the figure, the input rise/fall time is zero ideally. So, is or for and a new variable, , is defined as the voltage difference between and at , where is an integer; that is, . Also, for the bit transition pattern of 01 or 10, another variable, , is defined as the time difference between the threshold crossing times of and , as shown in Figures 3(a) and 3(c). The definition of the variables can be found in Table 1.
(a)
(b)
(c)
(d)
Because there are four different sets of the input signal, , and the initial condition, , depending on the bit transition patterns, the below differential equation of the first order RC low pass circuit should be solved for each bit transition pattern: First, when the bit transition pattern is 01 as shown in Figure 3(a), the initial condition and the input signal are and for , respectively. Then, the output signal is By using that , the relationship between and is obtained as where and, by using that , is obtained as a function of : Second, when the bit transition pattern is 00 as shown in Figure 3(b), and for . Then, the output signal is and, by using that , another relationship between and is obtained: Finally, when the bit transition pattern is 10 or 11 as shown in Figures 3(c) or 3(d), the same relationship between and can be obtained as (3) or (6) and can be obtained as (4) because Figures 3(c) and 3(d) are just vertically symmetric with Figures 3(a) and 3(b). In summary, (3) and (6) describe how is updated to per every according to the bit transition pattern and (4) describes how relates to when a bit transition occurs.
2.2. DDJ Calculation
By using (3), (6), and (4), the DDJ can be derived through the following steps.(i)Calculate by using (3) and (6) for the repeated data pattern with the finite pattern length of .(ii)Find the maximum and minimum values, and , among the set of the calculated values.(iii)Calculate and corresponding to and by using (4). Note that is inversely proportional to as shown in Figure 4.(iv)Finally, . For random data with the infinite pattern length, the DDJ equation should be modified appropriately.
If a data pattern has the finite pattern length of and passes through a first order RC low pass circuit in a steady state, there should exist different values of in the output waveform. For example, if a data pattern is PRBS3, the pattern length is 7 and is always mapped to one of , , , , , , as shown in Figure 5. However, all of do not need to be considered for calculation of the DDJ. Among , , , , , , , , , , and are needed because only they are at the bit transition edges of PRBS3. Thus, if the number of bit transitions within a data pattern is , only values of need to be considered for calculation of the DDJ. On the other hand, has Markov property [15, 16]. A variable is said to have Markov property if the future value depends only on the present value and not on the past values. As seen from (3) and (6), depends only on and not on the preceding values of such as and . Thus, By using the repetitiveness of PRBS3, and, thus, , , , and are obtained as follows: Before finding and from (8) to (11), can be generalized to for any data pattern with the finite pattern length of . Here, is the number of bit transitions and is an integer variable defined as the relative bit distance of the th bit transition backwards from , where . In (12), is determined by the relative bit transition positions within the data pattern because the relationship between and is determined by (3) whenever a bit transition occurs like 01 or 10 and by (6) whenever a bit holds like 00 or 11. Figure 6 shows that , , , and for and , , , and for , respectively, as an example. The obtained values of in Figure 6 agree well with (8) and (9). Thus, can be generally represented as (12) for any data pattern with the finite pattern length of if the data pattern is known.
(a)
(b)
Now, and can be found among . If and , where , and can be compared by using the following theorems, of which proofs are given in Appendix A.
Theorem 1. If , then .
Theorem 2. If for all , where is an integer and , then .
Theorem 3. If for all , where is an integer and , then .
For PRBS3, by Theorem 1 because and by Theorem 2 because as seen from (8)~(11). These theorems can be generally applied to any data pattern with the finite pattern length. However, if a data pattern is random and has the infinite pattern length, there are infinite numbers of and so and are obtained in the different way. In that case, the number of maximum consecutive identical bits is also infinite so that from (12) and from (3).
After and are found, and are obtained by (4) as and the DDJ is finally derived as Thus, for PRBS3, and, for random data, Additionally, for other PRBS data patterns like PRBS4 and PRBS5, the DDJ can be derived as shown in Appendix B. Carefully observing (15), (16), (B.1), and (B.2), the DDJ can be generally approximated to for any data pattern by using the number of maximum consecutive identical bits, . For any PRBS data patterns, the number of maximum consecutive identical bits equals . Finally, the calculated , , , , and DDJ are compared for various data patterns in Table 2. The DDJ of PRBS approaches the DDJ of random data as the number of maximum consecutive identical bits, , increases to the infinity.
3. Calculation of DDJ with Nonzero Input Rise/Fall Time
3.1. Differential Equation of First Order RC Low Pass Circuit
Now, the effect of the nonzero input rise/fall time on the DDJ can be considered. The differential equation of (1) should be solved again for four different bit transition patterns, such as 01, 00, 10, and 11, when the input rise/fall time is as shown in Figure 7. Although there are more accurate models for the rising/falling edges of the input signal, , the first order model is adopted for simplicity of calculation to derive the closed-form DDJ equations in this paper.
(a)
(b)
(c)
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First, when the bit transition pattern is 01 as shown in Figure 7(a), the initial condition is and the input signal is for and for , respectively. Then, the output signal is By using that , the relationship between and is obtained as where and . Also, by using that , can be obtained as a function of . However, to solve , (18) should be used if and (19) should be used if . Because is equivalent to in Figure 7(a), we can say that (18) should be used if and (19) should be used if . Figure 8 shows the sufficient condition for regardless of as region 1 and regardless of as region 2, respectively. Region 3 is located between region 1 and region 2, in which can be larger or less than depending on . The regions 1, 2, and 3 of Figure 8 can be obtained by solving . Here, is the 3 dB bandwidth of the first order low pass system which is defined as . Thus, is obtained as from (19) in region 1 and from (18) in region 2, respectively. In region 3, either (21) or (22) should be appropriately chosen for but after both (21) and (22) are evaluated and compared with because (21) is used if and (22) is used if . Second, when the bit transition pattern is 00 as shown in Figure 7(b), the initial condition and the input signal are equal to those of Figure 3(b) so that the same relationship between and is obtained: Finally, when the bit transition pattern is 10 or 11 as shown in Figures 7(c) or 7(d), the same relationship between and can be obtained as (20) or (23) and can be obtained from (21) or (22) because Figures 7(c) and 7(d) are just vertically symmetric with Figures 7(a) and 7(b), respectively.
3.2. DDJ Calculation
As seen from (20) and (23), has Markov property also when the input rise/fall time is . Thus, can be generally represented as for any data pattern with the finite pattern length of by following the same steps explained in Section 2.2. Here, is the number of bit transitions within the data pattern and is an integer variable defined as the relative bit distance of the th bit transition backwards from , where . The only difference between (24) and (12) is the additional multiplication factor, , in (24). So, and can be found among by comparaing only values based on the same theorems stated in Section 2.2. Of course, if a data pattern is random and has the infinite pattern length, and . For any data pattern, and can be obtained from either (21) or (22) depending on and . If and are in region 1 of Figure 8, from (21) and if and are in region 2, from (22). Otherwise, if and are in region 3, the appropriate equations should be chosen from (25) and (26) for calculation of and by comparing the calculated values of and with . Consequently, the DDJ is derived as in region 1 and the DDJ is calculated by using (26) in region 2. Although (27) and (14) look a bit different, the DDJ equation of (27) equals the DDJ equation of (14) since and are linearly proportional to the multiplication factor, , as shown in (24) and thus is cancelled out from (27). This means that the DDJ value does not depend on in region 1 and equals the DDJ value when . On the other hand, the DDJ value in region 2 is slightly larger than the DDJ value when . However, the difference is quite small and acceptable because the system bandwidth is relatively large compared to the bit rate in region 2 as shown in Figure 8 and so the DDJ value is very small in itself.
4. Simulation Results
Figure 9 shows the eye diagrams of the simulated input and output waveforms when the data pattern is (a) PRBS3 and (b) random, respectively. The input rise/fall time is zero, the bit rate is 10 Gb/s, and the system bandwidth is 2 GHz. All the waveforms were obtained by running Cadence Spectre. In Figure 9(a), among , , , , and , as discussed in Section 2.2. So, , , and . In Figure 9(b), and , and and correspond to and , respectively. All the simulated , , , , and DDJ for various data patterns agree exactly with the calculated values in Table 2.
(a)
(b)
Figure 10 compares the eye diagrams of the simulated output waveforms for and . The data pattern is random, the bit rate is 10 Gb/s, and the system bandwidth is 2 GHz. The input signal, of which rise/fall time is modeled by as first order approximation, is applied to the first order low pass system. As shown in Figure 10, two output waveforms slightly differ from each other only around the transition edges of the input signals; however, they exactly coincide with each other around the transition edges of the output signals. Thus, the simulated DDJ when equals the simulated DDJ when . This coincidence between and is due to the fact that and are in region 1.
Figure 11(a) shows the comparison of the simulated DDJ with the calculated DDJ by (16) in this work and the calculated DDJ by in [10]. The calculated DDJ in this work better estimates the simulated DDJ. As the system bandwidth, , decreases, the calculated DDJ by in [10] underestimates the simulated DDJ because in [10] was derived by using only two preceding bits as discussed in Appendix C. Figure 11(b) shows the simulated DDJ for various input rise/fall times. varies from 0 to . If and are in region 1, the simulated DDJ does not depend on ; however, in region 2, the simulated DDJ starts to deviate as increases. Even in this case, the deviation of the simulated DDJ is smaller than 0.008 UI because the absolute DDJ value is very small in itself, that is, less than 0.01 UI, in region 2. The system bandwidth, , is relatively large compared to the bit rate, , in region 2 as shown in Figure 8.
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Additionally, the simulated DDJ values when the low pass system has the additional second pole, , are summarized in Table 3. As shown in the table, the calculated DDJ values by the derived equations agree well with the simulated results with the accuracy of less than 0.021 UI when the second pole is larger than 5 times of the first pole, that is, 10 GHz. However, if the second pole approaches the first pole, the system bandwidth now decreases less than the first pole so that the simulated results start to deviate from the calculated DDJ values.
5. Conclusion
The closed-form equation of DDJ in a first order low pass system has been derived. If the bit rate, the system bandwidth, the input rise/fall time, and the number of maximum consecutive identical bits are given, the DDJ can be calculated exactly in region 1 and accurately in regions 2 and 3. The simulated DDJ agrees well with the calculated DDJ. Because the DDJ in the transmission line may apply to the interconnect channels such as off-chip PCB traces, off-chip cables, and on-chip interconnect lines and the DDJ in the first order low pass system may apply to the transceiver circuit building blocks such as drivers, buffers, amplifiers, and limiters, the derived equation can be generally used for a high speed serial interface when we design system architecture, link budget, and each circuit building block which can be modeled as a first order low pass system.
Appendices
A. Proofs of Theorems 1, 2, and 3
Proof of Theorem 1. Subtracting from leads to because . By using the fact that is minimum when and , because is smaller than 0.5 as far as the system bandwidth, , is larger than 11% of the bit rate, , which is typical of the high speed serial interface systems [8].
Proof of Theorem 2. Subtracting from leads to because . By using the fact that is minimum at and , because is smaller than 0.5.
Proof of Theorem 3. Subtracting from leads to because . By using the fact that is minimum at and , because is smaller than 0.5.
B. Closed-Form DDJ Equations of PRBS4 and PRBS5
Following the same steps explained in Section 2.2, the DDJ can be derived for other PRBS data. For PRBS4 and for PRBS5
C. Comments on the DDJ Equation of (10) in [10]
In [10], the closed-form DDJ equation of has been calculated for the first order low pass system by considering only two preceding bits, and , as follows: where and . However, as the bit rate increases relatively to the system bandwidth, increases and the impact of additional bits such as and should be considered as shown in Figure 3 of [10]. Consequently, the calculated DDJ by in [10], which is rewritten in (C.1), underestimates the simulated DDJ as shown in Figure 11(a).
Conflict of Interests
The author declares that there is no conflict of interests regarding the publication of this paper.
Acknowledgments
This work was supported by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education, Science and Technology (NRF-2012R1A1A1008324). The CAD tools were supported by IDEC.