Modeling of Memristive and Memcapacitive Behaviors in Metal-Oxide Junctions

Figure 9

Verification of tunneling model with preciously published results. (a) A pinched hysteresis loop for a fabricated Ag (200 nm)/TiO_2−x (20 nm)/TiO₂ (2 nm)/ITO (200 nm) memristor that shows bipolar switching behavior [39]. (b) Measured Pt/TiO₂/Ti junction conductance versus estimated filament length using pressure-modulated conductance microscopy PCM [25]. Simulation parameter: , , , , , , , , , , , , , , , , and .

(a)

(b)