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VLSI Design
Volume 8 (1998), Issue 1-4, Pages 165-172
http://dx.doi.org/10.1155/1998/20250

Open Problems in Quantum Simulation in Ultra-Submicron Devices

1Center for Solid State Electronics Research, Arizona State University, Tempe 85287-6206, AZ, USA
2Department of Electrical and Electronic Engineering, University of Glasgow, Glasgow G12 8QQ, United Kingdom

Copyright © 1998 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

Quantum transport is becoming more significant as device size shrinks. For example, as device sizes are scaled below 0.1 μm, the number of impurities becomes quite small, so that they are no longer homogeneously distributed throughout the device volume and the carriers are localized into quantum boxes, in that self-energy corrections produced by locally high carrier densities will lead to quantum dot formation. This leads to the need to discuss transport through an array of such quantum structures. Here, we discuss several issues which must be considered in treating the transport through such devices.