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VLSI Design
Volume 8 (1998), Issue 1-4, Pages 47-51
http://dx.doi.org/10.1155/1998/23567

Interface Roughness Effects in Ultra-Thin Tunneling Oxides

1Department of Physics, National Tsing Hua University, ROC, Hsinchu 300, Taiwan
2Thomas J. Watson, Sr., Laboratory of Applied Physics, California Institute of Technology Pasadena, California 91125, USA

Copyright © 1998 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

Advanced MOSFET for ULSI and novel silicon-based devices require the use of ultrathin tunneling oxides where non-uniformity is often present. We report on our theoretical study of how tunneling properties of ultra-thin oxides are affected by roughness at the silicon/oxide interface. The effect of rough interfacial topography is accounted for by using the Planar Supercell Stack Method (PSSM) which can accurately and efficiently compute scattering properties of 3D supercell structures. Our results indicate that while interface roughness effects can be substantial in the direct tunneling regime, they are less important in the Fowler-Nordheim regime.