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VLSI Design
Volume 8 (1998), Issue 1-4, Pages 257-260
http://dx.doi.org/10.1155/1998/94915

A β-SiC MOSFET Monte Carlo Simulator Including Inversion Layer Quantization

Departamento de Electrónica y Tecnologĺa de Computadores, Universidad de Granada, Facultad de Cieneias, Avd. Fuentenueva s/n, 18071 Granada, Spain

Copyright © 1998 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

F. Gámiz, J. B. Roldán, and J. A. López-Villanueva, “A β-SiC MOSFET Monte Carlo Simulator Including Inversion Layer Quantization,” VLSI Design, vol. 8, no. 1-4, pp. 257-260, 1998. doi:10.1155/1998/94915