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VLSI Design
Volume 10 (1999), Issue 1, Pages 87-97
http://dx.doi.org/10.1155/1999/47230

Lower-Power and Min-Crosstalk Channel Routing for Deep-Submicron Layout Design

1Dept. of Elect. and Comp. Eng., Sungkyunkwan Univ., Suwon 440-746, Korea
2Fakultät Jür Math. und Informatik, Univ. Konstanz, Fach D 188, Konstanz D-78457, Germany

Received 7 September 1998; Accepted 20 November 1998

Copyright © 1999 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

Consider a set of nets given by horizontal segments S={s1,s2,...,sn} and a set of tracks T={t1,t2,...,tk} in a channel, then a track assignment consists in an assignment of the nets to the tracks such that no two nets assigned to the same track overlap. One important goal is to find a track assignment with the minimum number of tracks such that the signal interference between nets assigned to neighboring tracks is minimized. This problem is called crosstalk minimization. For a given track assignment with k tracks, crosstalk can be reduced by finding another track assignment for S with k tracks (i.e., by permuting tracks). However, considering all possible permutations requires exponential time. For general cost function for crosstalk measure, the problem is NPhard. Several heuristic approaches were previously presented. In this paper, we consider special instances of the crosstalk-minimization problem where the cost function depends only on the length of the segments that runs in parallel and all pairs of segments intersect. An algorithm solving this problem in O(n log n) time is presented. An extension applied to the instances with more general function of switching activity and mixed signal sensitivity to reduce crosstalk and power consumption is also presented.