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VLSI Design
Volume 10 (1999), Issue 1, Pages 71-86
http://dx.doi.org/10.1155/1999/89835

Empirical Study of Block Placement by Cluster Refinement

1Cadence Design Systems, Inc., 555 River Oaks Parkway, San Jose, CA 95134, USA
2Department of Computer Science and Engineering, University of California, La Jolla, San Diego, CA 92093-0114, USA

Received 7 September 1998; Accepted 20 November 1998

Copyright © 1999 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

In this paper we propose an efficient cluster refinement approach for macro-cell placement. The algorithm selects a cluster of blocks dynamically, and finds an optimal solution for all the blocks in the cluster simultaneously. This is different from previous zone refinement approach which optimizes the allocation of one single block in each operation. Experimental results on the MCNC benchmark circuits show that the approach achieves excellent area utilization while minimizing the wire length at the same time.