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VLSI Design
Volume 11 (2000), Issue 3, Pages 285-300
http://dx.doi.org/10.1155/2000/19436

Multilevel k-way Hypergraph Partitioning

Department of Computer Science and Engineering, Army HPC Research Center, University of Minnesota, Minneapolis 55455, MN, USA

Received 1 March 1999; Accepted 1 December 1999

Copyright © 2000 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

In this paper, we present a new multilevel k-way hypergraph partitioning algorithm that substantially outperforms the existing state-of-the-art K-PM/LR algorithm for multi-way partitioning, both for optimizing local as well as global objectives. Experiments on the ISPD98 benchmark suite show that the partitionings produced by our scheme are on the average 15% to 23% better than those produced by the K-PM/LR algorithm, both in terms of the hyperedge cut as well as the (K – 1) metric. Furthermore, our algorithm is significantly faster, requiring 4 to 5 times less time than that required by K-PM/LR.