A Low-Voltage Floating-Gate MOS Biquad

Rodríguez-Villegas, Esther O.; Yúfera, Alberto; Rueda, Adoración

doi:https://doi.org/10.1155/2001/16935

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Low Power Architecture and Circuit Design Computer Aided Design

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Volume 12 | Article ID 016935 | https://doi.org/10.1155/2001/16935

A Low-Voltage Floating-Gate MOS Biquad

Esther O. Rodríguez-Villegas,¹Alberto Yúfera,¹and Adoración Rueda¹

Received20 Jun 2000

Revised03 Aug 2000

Abstract

A second-order g_m-C filter based on the Floating-Gate MOS (FGMOS) technique is presented. It uses a new fully differential transconductor and works at 2 V of voltage supply with a full differential input linear range and a THD below 1%. Programming and tuning are performed by means of a single voltage signal. The transconductor incorporates a novel Common-Mode Feedback Circuit (CMFB) based also on FGMOS transistors.

Copyright

Copyright © 2001 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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