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VLSI Design
Volume 12 (2001), Issue 3, Pages 407-414
doi:10.1155/2001/16935
A Low-Voltage Floating-Gate MOS Biquad
Instituto de Microelectrónica de Sevilla (IMSE), Centro Nacional de Microelectrónica (CNM), Edificio CICA, Avda. Reina Mercedes s/n, Sevilla 41012, Spain
Received 20 June 2000; Revised 3 August 2000
Copyright © 2001 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
Abstract
A second-order gm-C filter based on the Floating-Gate MOS (FGMOS) technique is presented. It uses a new fully differential transconductor and works at 2 V of voltage supply with a full differential input linear range and a THD below 1%. Programming and tuning are performed by means of a single voltage signal. The transconductor incorporates a novel Common-Mode Feedback Circuit (CMFB) based also on FGMOS transistors.