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VLSI Design
Volume 13 (2001), Issue 1-4, Pages 169-173
http://dx.doi.org/10.1155/2001/63643

Non-Equilibrium Hole Transport in Deep Sub-Micron Well-Tempered Si p-MOSFETs

Device Modelling Group, Department of Electronics and Electrical Engineering, University of Glasgow, Glasgow G12 8LT, UK

Copyright © 2001 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

J. R. Watling, Y. P. Zhao, A. Asenov, and J. R. Barker, “Non-Equilibrium Hole Transport in Deep Sub-Micron Well-Tempered Si p-MOSFETs,” VLSI Design, vol. 13, no. 1-4, pp. 169-173, 2001. doi:10.1155/2001/63643